Abstract: A method of forming a device includes forming a buried well region of a first dopant type in a substrate. A well region of the first dopant type is formed over the buried well region. A first well region of a second dopant type is formed between the well region of the first dopant type and the buried well region of the first dopant type. A second well region of the second dopant type is formed in the well region of the first dopant type. An isolation structure is formed at least partially in the well region of the first dopant type. A first gate electrode is formed over the isolation structure and the second well region of the second dopant type.

Abstract: The present invention relates to a light quality evaluating device, comprising a light receiving unit, first processing unit, a memory unit, a second processing unit, a display unit, and a power management unit, and being used for evaluating the light quality light based on physiological perception of human. In evaluating operation, it transfers a power spectrum of the light emitted from a light source to a luminance spectrum of light through a luminosity function. Next, the method compares the luminance spectrum of light with a corresponding luminance spectrum of blackbody radiation thereof. Therefore, an index of spectral resemblance with respect to the black body radiation (SRBR) would be calculated and then obtained, such that the SRBR can be used for evaluating the quality of the light emitted from the light source. Moreover, comparing to conventional CRI, SRBR is a better light quality evaluating method because of having fairness and consistency.

Abstract: The present invention relates to a light quality evaluating device, comprising a light receiving unit, first processing unit, a memory unit, a second processing unit, a display unit, and a power management unit, and being used for evaluating the light quality light based on physiological perception of human. In evaluating operation, it transfers a power spectrum of the light emitted from a light source to a luminance spectrum of light through a luminosity function. Next, the method compares the luminance spectrum of light with a corresponding luminance spectrum of blackbody radiation thereof. Therefore, an index of spectral resemblance with respect to the black body radiation (SRBR) would be calculated and then obtained, such that the SRBR can be used for evaluating the quality of the light emitted from the light source. Moreover, comparing to conventional CRI, SRBR is a better light quality evaluating method because of having fairness and consistency.

Abstract: The present invention relates to a light source quality evaluating method by using spectral resemblance with respect to the blackbody radiation, which mainly comprises 5 method steps. This method is used for evaluating the quality of light based on physiological perception of human. In evaluating operation, the method firstly transfers a power spectrum of a light source to a luminance spectrum of light source through a luminosity function. Next, the method compares the luminance spectrum of light source with a luminance spectrum of the blackbody radiation thereof. Therefore, an index of spectral resemblance with respect to the black body radiation (SRBR) would be calculated and then obtained, such that the SRBR can be used for evaluating the quality of the light source. Moreover, comparing to conventional color rendering index (CRI), SRBR is a better light source quality evaluating method because of having fairness and consistency.

Abstract: The present invention relates to a full-band and high-CRI organic light-emitting diode, comprising: a first conductive layer, at least one first carrier transition layer, a plurality of light-emitting layers, at least one second carrier transition layer, and a second conductive layer. In the present invention, a plurality of dyes are doped in the light-emitting layers, so as to make the light-emitting layers emit a plurality of blackbody radiation complementary lights, wherein the chromaticity coordinates of the blackbody radiation complementary lights surround to a specific area on 1931 CIE (Commission International de'Eclairage) Chromaticity Diagram, moreover, the specific area fully encloses the Planck's locus on 1931 CIE Chromaticity Diagram, such that the blackbody radiation complementary lights mix to each other and then become a full-band and high-CRI light.

Abstract: The present invention relates to a full-band and high-CRI organic light-emitting diode, comprising: a first conductive layer, at least one first carrier transition layer, a plurality of light-emitting layers, at least one second carrier transition layer, and a second conductive layer. In the present invention, a plurality of dyes are doped in the light-emitting layers, so as to make the light-emitting layers emit a plurality of blackbody radiation complementary lights, wherein the chromaticity coordinates of the blackbody radiation complementary lights surround to a specific area on 1931 CIE (Commission International de'Eclairage) Chromaticity Diagram, moreover, the specific area fully encloses the Planck's locus on 1931 CIE Chromaticity Diagram, such that the blackbody radiation complementary lights mix to each other and then become a full-band and high-CRI light.

Abstract: A method of forming a device includes forming a buried well region of a first dopant type in a substrate. A well region of the first dopant type is formed over the buried well region. A first well region of a second dopant type is formed between the well region of the first dopant type and the buried well region of the first dopant type. A second well region of the second dopant type is formed in the well region of the first dopant type. An isolation structure is formed at least partially in the well region of the first dopant type. A first gate electrode is formed over the isolation structure and the second well region of the second dopant type.

Abstract: A high voltage (HV) device includes a well region of a first dopant type disposed in a substrate. A first well region of a second dopant type is disposed in the well region of the first dopant type. An isolation structure is at least partially disposed in the well region of the first dopant type. A first gate electrode is disposed over the isolation structure and the first well region of the second dopant type. A second well region of the second dopant type is disposed in the well region of the first dopant type. The second well region of the second dopant type is spaced from the first well region of the second dopant type. A second gate electrode is disposed between and over the first well region of the second dopant type and the second well region of the second dopant type.

Abstract: Systems and methods for communicating faults across a communications network cross-connect are provided. In one embodiment, a method for communicating an alarm condition in a cross-connected network is provided. The method comprises providing a cross-connect having a first side and a second side, wherein the first side includes a plurality of interface ports and the second side includes an interface port; detecting a fault on a first interface port of the first side; and when a fault is detected on the first interface port of the first side, transmitting a signal on the interface port of the second side, the signal having a pre-defined alarm data pattern inserted into one or more time slots associated with the first interface port of the first side.

Abstract: A high voltage (HV) device includes a well region of a first dopant type disposed in a substrate. A first well region of a second dopant type is disposed in the well region of the first dopant type. An isolation structure is at least partially disposed in the well region of the first dopant type. A first gate electrode is disposed over the isolation structure and the first well region of the second dopant type. A second well region of the second dopant type is disposed in the well region of the first dopant type. The second well region of the second dopant type is spaced from the first well region of the second dopant type. A second gate electrode is disposed between and over the first well region of the second dopant type and the second well region of the second dopant type.

Abstract: A communication network comprises a first digital subscriber line (DSL) unit having a plurality of application ports and at least one DSL port; and a second DSL unit having a plurality of application ports and at least one DSL port; wherein the first DSL unit is communicatively coupled to the second DSL unit via a DSL pair coupled to the at least one DSL port in each of the first and second DSL units; and wherein each of the first and second DSL units are configured to receive a signal of a first interface format over one of the plurality of application ports, extract timeslots from the received first interface format signal, transmit the timeslots over the at least one DSL port, and use timeslots received over the at least one DSL port to generate at least one second signal of a dissimilar interface format.

Abstract: Systems and methods for communicating faults across a communications network cross-connect are provided. In one embodiment, a method for communicating an alarm condition in a cross-connected network is provided. The method comprises providing a cross-connect having a first side and a second side, wherein the first side includes a plurality of interface ports and the second side includes an interface port; detecting a fault on a first interface port of the first side; and when a fault is detected on the first interface port of the first side, transmitting a signal on the interface port of the second side, the signal having a pre-defined alarm data pattern inserted into one or more time slots associated with the first interface port of the first side.

Abstract: A semiconductor structure for electrostatic discharge protection is presented. The semiconductor structure comprises a grounded gate nMOS (GGNMOS) having a substrate, a gate electrode, a source region and a drain region. A plurality of contact plugs is formed on the source and drain side. A plurality of first level vias is electrically coupled to the GGNMOS and has a substantially asymmetrical layout in the source and drain regions. A second level via(s) re-routes the ESD current to the desired first level vias. The uniformity of the current flow in the GGNMOS is improved.

Abstract: A communication network comprises a first digital subscriber line (DSL) unit having a plurality of application ports and at least one DSL port; and a second DSL unit having a plurality of application ports and at least one DSL port; wherein the first DSL unit is communicatively coupled to the second DSL unit via a DSL pair coupled to the at least one DSL port in each of the first and second DSL units; and wherein each of the first and second DSL units are configured to receive a signal of a first interface format over one of the plurality of application ports, extract timeslots from the received first interface format signal, transmit the timeslots over the at least one DSL port, and use timeslots received over the at least one DSL port to generate at least one second signal of a dissimilar interface format.

Abstract: An electrostatic discharge (ESD) protection circuit. The ESD protection circuit comprises a silicon controlled rectifier (SCR) device and a metal-oxide-semiconductor (MOS) triggering device. The SCR device has a cathode connected to a first fixed potential and an anode. The MOS triggering device has a gate and a source connected to the first fixed potential and a drain connected to the anode. In addition, the MOS triggering device is not physically disposed in the SCR device.

Abstract: A system and method is disclosed for implementing a new bipolar-based silicon controlled rectifier (SCR) circuit for an electrostatic discharge (ESD) protection. The SCR circuit comprises a bipolar device to be formed on a semiconductor substrate. The bipolar device comprises at least an N-well for providing a high resistance and a P+ material to be used as a collector thereof for further providing a high resistance. At least an Nmoat guard ring and a Pmoat guard ring surround the bipolar device, wherein when an ESD event occurs, the high resistance provided by the N-well and the P+ material of the bipolar device increases a turn-on speed.

Abstract: The present disclosure provides a process for producing a SiGe layer in a bipolar device having a reduced amount of gaps or discontinuities on a shallow trench isolation (STI) region use for a base electrode connection. The process is used for forming an SiGe layer for use in a semiconductor device. The process includes doping a single crystal substrate with a first dopant type, baking the doped single crystal substrate at a temperature less than 900° C., and at a pressure less than 100 torr; and depositing the SiGe layer on the baked single crystal substrate (epi SiGe) to serve as the base electrode and on the STI region (poly SiGe) to serve as a connection for the base electrode. The semiconductor device is thereby created from the combination of the doped single crystal substrate and the deposited SiGe layer.

Abstract: The present disclosure provides a process for producing a SiGe layer in a bipolar device having a reduced amount of gaps or discontinuities on a shallow trench isolation (STI) region use for a base electrode connection. The process is used for forming an SiGe layer for use in a semiconductor device. The process includes doping a single crystal substrate with a first dopant type, baking the doped single crystal substrate at a temperature less than 900° C., and at a pressure less than 100 torr; and depositing the SiGe layer on the baked single crystal substrate (epi SiGe) to serve as the base electrode and on the STI region (poly SiGe) to serve as a connection for the base electrode. The semiconductor device is thereby created from the combination of the doped single crystal substrate and the deposited SiGe layer.

Abstract: A phase difference measuring device includes a phase detector, a low-pass filter/voltage controlled oscillator, a reference signal selector for selecting either an internal reference signal or an external reference signal as a reference signal, a phase comparator for comparing an undertest signal with the selected reference signal and obtaining a phase difference between the two compared signal. The internal reference signal is selected when the undertest signal is a jittering signal, and the external reference signal is selected when the undertest signal is a wandering signal. The undertest signal, the selected reference signal, and a relatively high frequency clock signal from external are sent to the phase comparator and a phase difference between the undertest signal and the selected reference signal is counted by the relatively high frequency clock signal.