Patents by Inventor Fu-Hsiang Hsu

Fu-Hsiang Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7157360
    Abstract: A memory device with an improved passivation structure. The memory device includes a semiconductor substrate with memory units thereon, an interconnect structure over the surface of the semiconductor substrate to connect with the memory units, and a passivation structure over the surface of the interconnect structure. The passivation structure comprises a dielectric layer over the surface of the interconnect structure and a silicon-oxy-nitride (SiOxNy) layer over the surface of the dielectric layer.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: January 2, 2007
    Assignee: Macronix International Co., Ltd.
    Inventors: Hung-Yu Chiu, U-Way Tseng, Wen-Pin Lu, Cheng-Chen Huseh, Pei-Ren Jeng, Fu-Hsiang Hsu
  • Patent number: 6916736
    Abstract: A method of forming an intermetal dielectric (IMD) layer. At least one metal wire is formed on a substrate. A filling oxide layer is formed on the substrate and the metal wire. The surface of the filling oxide layer is smoothed. A first silicon-rich oxide layer is formed on the filling oxide layer, where the refractive index (RI) of the first silicon-rich oxide layer is 1.6˜1.64. A second silicon-rich oxide layer is formed on the first silicon-rich oxide layer, where the refractive index of the second silicon-rich oxide layer is 1.49˜1.55. According to the present method, the diffusion of mobile hydrogen ions is blocked by manufacture with dual silicon-rich oxide layers.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: July 12, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Fu-Hsiang Hsu, U-Way Tseng, Hung-Yu Chiu, Shih-Liang Chou, Shin-Yi Chou
  • Patent number: 6867466
    Abstract: A memory device with an improved passivation structure. The memory device includes a semiconductor substrate with memory units thereon, an interconnect structure over the surface of the semiconductor substrate to connect with the memory units, and a passivation structure over the surface of the interconnect structure. The passivation structure comprises a dielectric layer over the surface of the interconnect structure and a silicon-oxy-nitride (SiOxNy) layer over the surface of the dielectric layer.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: March 15, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Hung-Yu Chiu, U-Way Tseng, Wen-Pin Lu, Cheng-Chen Huseh, Pei-Ren Jeng, Fu-Hsiang Hsu
  • Publication number: 20040056360
    Abstract: A memory device with an improved passivation structure. The memory device includes a semiconductor substrate with memory units thereon, an interconnect structure over the surface of the semiconductor substrate to connect with the memory units, and a passivation structure over the surface of the interconnect structure. The passivation structure comprises a dielectric layer over the surface of the interconnect structure and a silicon-oxy-nitride (SiOxNy) layer over the surface of the dielectric layer.
    Type: Application
    Filed: September 29, 2003
    Publication date: March 25, 2004
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hung-Yu Chiu, U-Way Tseng, Wen-Pin Lu, Cheng-Chen Huseh, Pei-Ren Jeng, Fu-Hsiang Hsu
  • Publication number: 20030181030
    Abstract: A method of forming an intermetal dielectric (IMD) layer. At least one metal wire is formed on a substrate. A filling oxide layer is formed on the substrate and the metal wire. The surface of the filling oxide layer is smoothed. A first silicon-rich oxide layer is formed on the filling oxide layer, where the refractive index (RI) of the first silicon-rich oxide layer is 1.6˜1.64. A second silicon-rich oxide layer is formed on the first silicon-rich oxide layer, where the refractive index of the second silicon-rich oxide layer is 1.49˜1.55. According to the present method, the diffusion of mobile hydrogen ions is blocked by manufacture with dual silicon-rich oxide layers.
    Type: Application
    Filed: March 19, 2003
    Publication date: September 25, 2003
    Inventors: Fu-Hsiang Hsu, U-Way Tseng, Hung-Yu Chiu, Shih-Liang Chou, Shin-Yi Chou
  • Publication number: 20030173670
    Abstract: A memory device with an improved passivation structure. The memory device includes a semiconductor substrate with memory units thereon, an interconnect structure over the surface of the semiconductor substrate to connect with the memory units, and a passivation structure over the surface of the interconnect structure. The passivation structure comprises a dielectric layer over the surface of the interconnect structure and a silicon-oxy-nitride (SiOxNy) layer over the surface of the dielectric layer.
    Type: Application
    Filed: September 13, 2002
    Publication date: September 18, 2003
    Inventors: Hung-Yu Chiu, U-Way Tseng, Wen-Pin Lu, Cheng-Chen Huseh, Pei-Ren Jeng, Fu-Hsiang Hsu