Patents by Inventor Fu-Hsien HUANG

Fu-Hsien HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240140782
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
  • Patent number: 11911991
    Abstract: An apparatus and method for expanding a box blank into a box, the apparatus comprising an arm assembly, a controller, a camera and a box blank conveyor. The arm assembly includes a folding arm having a position in a first direction and a rotational angle controlled by the controller based on a position of a feature of the box blank in the field of view of the camera. The camera captures images of the box blank which are used to position the arm assembly and to evaluate the need to reject a box blank.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Szu-Chen Huang, Fu-Hsien Li, Mao-Jung Chiu, Mao-Shun Lien, Po-Hsien Chiu
  • Patent number: 9621147
    Abstract: A gate pulse modulation waveform-shaping circuit includes an input terminal, an output pair, and a gate pulse modulation waveform-shaping control circuit. The input terminal receives a control signal. The output pair is connected to a scan line for outputting a gate output voltage. The gate pulse modulation waveform-shaping control circuit is connected to the output pair for adjusting a voltage waveform on the scan line. The gate pulse modulation waveform-shaping control circuit is based on the control signal to use a time interval or fixed discharge voltage to generate a desired delay for adjusting a discharge slope thereby generating different discharge time on the scan line, so that the gate output voltage has a voltage waveform including at least two waveform segments each with a non-zero sliding slope and at least two waveform segments each with a zero slope.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: April 11, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Ching-Wen Shih, Fu-Hsien Huang
  • Publication number: 20160173078
    Abstract: A gate pulse modulation waveform-shaping circuit includes an input terminal, an output pair, and a gate pulse modulation waveform-shaping control circuit. The input terminal receives a control signal. The output pair is connected to a scan line for outputting a gate output voltage. The gate pulse modulation waveform-shaping control circuit is connected to the output pair for adjusting a voltage waveform on the scan line. The gate pulse modulation waveform-shaping control circuit is based on the control signal to use a time interval or fixed discharge voltage to generate a desired delay for adjusting a discharge slope thereby generating different discharge time on the scan line, so that the gate output voltage has a voltage waveform including at least two waveform segments each with a non-zero sliding slope and at least two waveform segments each with a zero slope.
    Type: Application
    Filed: November 24, 2015
    Publication date: June 16, 2016
    Inventors: Ching-Wen SHIH, Fu-Hsien HUANG