Patents by Inventor Fu-Jen Hsu

Fu-Jen Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230387215
    Abstract: A silicon carbide semiconductor device includes a drift layer, a first doped region, a second doped region, a gate trench, a third doped region and a gate electrode. The drift layer is disposed on a SiC substrate. The first doped region is disposed on the drift layer. The second doped region is disposed on the first doped region. The gate trench is extended from an upper surface of the second doped region through the first doped region and into the drift layer. The gate trench is formed in a manner dividing the drift layer into a plurality of mesas encircled by the gate trench, each of the mesas comprises a center portion and a plurality of leg portions extended from the center portion. The third doped region is arranged in the center portion of the mesa, and is disposed in the first doped region and adjacent to the second doped region. The gate electrode is arranged in the gate trench and dielectrically insulated from the first doped region, the second doped region and the drift layer by a gate insulator.
    Type: Application
    Filed: January 17, 2023
    Publication date: November 30, 2023
    Inventors: Cheng-Tyng YEN, Hsiang-Ting HUNG, Fu-Jen HSU
  • Publication number: 20230361209
    Abstract: A silicon carbide semiconductor device comprises a drift layer, a plurality of transistor cells and a gate structure. Each of the transistor cells comprises a first doped region, a second doped region, a third doped region and a fourth doped region. The first doped region is disposed in the drift layer. The second doped region is disposed in the first doped region. The third doped region is disposed in the first doped region and adjacent to the second doped region. The fourth doped region is disposed in or on the first doped region to form a channel region and is configured in a way such that the channel region is not fully depleted when a driving gate voltage applied to the semiconductor device is zero and the channel region is fully depleted when the driving gate voltage is less than a negative threshold voltage.
    Type: Application
    Filed: January 17, 2023
    Publication date: November 9, 2023
    Inventors: Cheng-Tyng YEN, Hsiang-Ting HUNG, Fu-Jen HSU
  • Publication number: 20230307556
    Abstract: A silicon carbide semiconductor device comprises a SiC substrate, a drift layer disposed on the substrate, a plurality of first doping regions formed near a surface of the drift layer, a plurality of second doping regions formed near the surface of the drift layer and between the first doping regions and a first metal layer disposed on the surface of the drift layer. The first metal layer forms an Ohmic contact with the second doped region. The drift layer has a first doping concentration of a first conductivity type and each of the second doping regions has a second doping concentration of the first conductivity type, which is higher than the first doping concentration. Each of the first doping regions has a first depth and each of the second doping regions has a second depth which is smaller than the first depth.
    Type: Application
    Filed: October 14, 2022
    Publication date: September 28, 2023
    Inventors: Fu-Jen HSU, Cheng-Tyng YEN, Hsiang-Ting HUNG
  • Publication number: 20230307507
    Abstract: A silicon carbide semiconductor device has an active area, a termination area surrounding the active area in a plan view. The silicon carbide semiconductor device comprises a SiC substrate, a drift layer, an insulating layer, a polysilicon layer, an interlayer dielectric layer disposed on the polysilicon layer, and a metal layer. The polysilicon layer includes a first portion disposed over the active area and a second portion disposed over the termination area. The metal layer includes a first portion disposed over the active area and a second portion disposed over the termination area. At least one of the second portion of the polysilicon layer and the second portion of the metal layer is configurated to electrically connect to at least one of a gate electrode and a source electrode.
    Type: Application
    Filed: July 27, 2022
    Publication date: September 28, 2023
    Inventors: Cheng-Tyng YEN, Hsiang-Ting HUNG, Fu-Jen HSU
  • Publication number: 20230275161
    Abstract: A semiconductor structure includes a Schottky diode structure, which includes: a first trench extending through a first N-type semiconductor layer and being disposed in the first N-type semiconductor layer; a first insulating layer disposed in the first trench; two polysilicon layers or metal silicide layers disposed in the first trench, wherein an upper one and a lower one of the polysilicon layers or metal silicide layers are disposed in parallel; a first P-type protective layer, which is grounded and disposed on a bottom of the first trench, and contacts the first insulating layer and a bottom surface of the lower one of the polysilicon layers or metal silicide layers; a metal layer respectively disposed as a top surface and a lower bottom surface of the semiconductor structure to form a source and a drain as electrodes for the semiconductor structure to be connected to an external device.
    Type: Application
    Filed: February 24, 2023
    Publication date: August 31, 2023
    Inventors: Chih-Fang HUANG, JIA-WEI HU, FU-JEN HSU
  • Patent number: 11489521
    Abstract: A power transistor module includes a power transistor device and a control circuit. The control circuit is electrically connected to the power transistor device for providing at least one gate voltage to drive the power transistor device, and adjusting the at least one gate voltage in response to an output power of the power transistor module. When the output power is greater than a predetermined power load, the at least one gate voltage has a first swing amplitude; and when the output power is less than or equal to the predetermined power load the at least one gate voltage has a second swing amplitude less than the first swing amplitude.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: November 1, 2022
    Assignee: FAST SIC SEMICONDUCTOR INCORPORATED
    Inventors: Cheng-Tyng Yen, Fu-Jen Hsu, Hsiang-Ting Hung
  • Patent number: 11222971
    Abstract: The present invention provides a silicon carbide (SiC) semiconductor device integrating a metal-oxide-semiconductor field-effect transistor (MOSFET) and a bidirectional voltage clamping circuit. An object of protecting a device is achieved by using the simple structure above, effectively preventing device damage that may be caused by a positive overvoltage and a negative overvoltage between a gate and a source.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: January 11, 2022
    Assignee: Shanghai Hestia Power Inc.
    Inventors: Cheng-Tyng Yen, Chien-Chung Hung, Fu-Jen Hsu, Kuo-Ting Chu
  • Patent number: 11190181
    Abstract: A power transistor module includes: a power transistor device and a control circuit electrically connected to the power transistor device. The control circuit provides at least one gate voltage to drive the power transistor device, and adjusts the gate voltage in response to at least one signal provided from an external device or fed back from the power transistor device; wherein the gate voltage is greater than a threshold voltage of the power transistor device, and a swing amplitude of the gate voltage is a monotonically increasing or decreasing function of the signal.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: November 30, 2021
    Assignee: FAST SIC SEMICONDUCTOR INCORPORATED
    Inventors: Cheng-Tyng Yen, Fu-Jen Hsu, Hsiang-Ting Hung
  • Publication number: 20210367593
    Abstract: A power transistor module includes a power transistor device and a control circuit. The control circuit is electrically connected to the power transistor device for providing at least one gate voltage to drive the power transistor device, and adjusting the at least one gate voltage in response to an output power of the power transistor module. When the output power is greater than a predetermined power load, the at least one gate voltage has a first swing amplitude; and when the output power is less than or equal to the predetermined power load the at least one gate voltage has a second swing amplitude less than the first swing amplitude.
    Type: Application
    Filed: August 10, 2021
    Publication date: November 25, 2021
    Inventors: Cheng-Tyng YEN, Fu-Jen HSU, Hsiang-Ting HUNG
  • Patent number: 11184003
    Abstract: A silicon carbide power device is controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: November 23, 2021
    Assignee: SHANGHAI HESTIA POWER INC.
    Inventors: Fu-Jen Hsu, Chien-Chung Hung, Kuo-Ting Chu, Chwan-Ying Lee
  • Publication number: 20210273636
    Abstract: A silicon carbide power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.
    Type: Application
    Filed: March 2, 2020
    Publication date: September 2, 2021
    Inventors: Fu-Jen HSU, Chien-Chung HUNG, Kuo-Ting CHU, Chwan-Ying LEE
  • Publication number: 20210273637
    Abstract: A silicon carbride power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbride power device.
    Type: Application
    Filed: September 3, 2020
    Publication date: September 2, 2021
    Inventors: Fu-Jen HSU, Chien-Chung HUNG, Kuo-Ting CHU, Chwan-Ying LEE
  • Patent number: 11108388
    Abstract: A silicon carbide power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: August 31, 2021
    Assignee: Shanghai Hestia Power, Inc.
    Inventors: Fu-Jen Hsu, Chien-Chung Hung, Kuo-Ting Chu, Chwan-Ying Lee
  • Publication number: 20210242868
    Abstract: A power transistor module includes: a power transistor device and a control circuit electrically connected to the power transistor device. The control circuit provides at least one gate voltage to drive the power transistor device, and adjusts the gate voltage in response to at least one signal provided from an external device or feedbacked from the power transistor device: wherein the gate voltage is greater than a threshold voltage of the power transistor device, and a swing amplitude of the gate voltage is a monotonically increasing or decreasing function of the signal.
    Type: Application
    Filed: January 19, 2021
    Publication date: August 5, 2021
    Inventors: Cheng-Tyng YEN, Fu-Jen HSU, Hsiang-Ting HUNG
  • Publication number: 20200161466
    Abstract: The present invention provides a silicon carbide (SiC) semiconductor device integrating a metal-oxide-semiconductor field-effect transistor (MOSFET) and a bidirectional voltage clamping circuit. An object of protecting a device is achieved by using the simple structure above, effectively preventing device damage that may be caused by a positive overvoltage and a negative overvoltage between a gate and a source.
    Type: Application
    Filed: November 20, 2019
    Publication date: May 21, 2020
    Inventors: Cheng-Tyng YEN, Chien-Chung HUNG, Fu-Jen HSU, Kuo-Ting CHU
  • Patent number: 10396774
    Abstract: An intelligent power component module operable to be driven by a negative gate voltage integrates a wide bandgap semiconductor power unit, an adjustment unit and a driving unit so as to adjust a voltage level of the driving unit by the adjustment unit. Accordingly, the wide bandgap semiconductor power unit, in a driven state, comprises a driving voltage level alternating between a positive and a negative voltage.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: August 27, 2019
    Assignee: Hestia Power Inc.
    Inventors: Chien-Chung Hung, Fu-Jen Hsu, Cheng-Tyng Yen, Chwan-Ying Lee
  • Publication number: 20190181849
    Abstract: An intelligent power component module operable to be driven by a negative gate voltage integrates a wide bandgap semiconductor power unit, an adjustment unit and a driving unit so as to adjust a voltage level of the driving unit by the adjustment unit. Accordingly, the wide bandgap semiconductor power unit, in a driven state, comprises a driving voltage level alternating between a positive and a negative voltage.
    Type: Application
    Filed: September 14, 2017
    Publication date: June 13, 2019
    Inventors: Chien-Chung Hung, Fu-Jen Hsu, Cheng-Tyng Yen, Chwan-Ying Lee
  • Patent number: 9761703
    Abstract: A wide bandgap semiconductor device with an adjustable voltage level includes a wide bandgap semiconductor power unit and a level adjusting unit. The wide bandgap semiconductor power unit includes a source terminal, to which the level adjusting unit is electrically connected. The level adjusting unit provides a level shift voltage via the source terminal to adjust a driving voltage level of the wide bandgap semiconductor power unit. By adjusting the driving voltage level of the wide bandgap semiconductor power unit using the level adjusting unit, the wide bandgap semiconductor device may serve as a high-voltage enhancement-mode transistor to achieve reduced costs and an increased switching speed.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: September 12, 2017
    Assignee: HESTIA POWER INC.
    Inventors: Fu-Jen Hsu, Chien-Chung Hung, Yao-Feng Huang, Cheng-Tyng Yen, Chwan-Ying Lee
  • Patent number: 9271328
    Abstract: The present invention provides a communication system between electric bikes and communication method thereof. The communication system comprises a plurality of electric bikes. Each of the electric bikes comprises a monitor module and a portable electric device, wherein the portable device further comprises a storing unit and a WiFi module. The monitor module is configured to monitor the status of the electric bike to generate a plurality of monitor information. When a temporary network is formed between the electric bikes, the electric bikes transmit the monitor information each other through the temporary network and each of the electric bikes stores the received monitor information.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: February 23, 2016
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Yi Chang, Wei-Hua Chieng, Shyr-Long Jeng, Stone Cheng, Fu-Jen Hsu, Bin-Han Lue, Chih-Chiang Wu, Ching-Wei Shih
  • Publication number: 20150120131
    Abstract: The present invention provides a communication system between electric bikes and communication method thereof. The communication system comprises a plurality of electric bikes. Each of the electric bikes comprises a monitor module and a portable electric device, wherein the portable device further comprises a storing unit and a WiFi module. The monitor module is configured to monitor the status of the electric bike to generate a plurality of monitor information. When a temporary network is formed between the electric bikes, the electric bikes transmit the monitor information each other through the temporary network and each of the electric bikes stores the received monitor information.
    Type: Application
    Filed: January 30, 2014
    Publication date: April 30, 2015
    Applicant: National Chiao Tung University
    Inventors: Yi CHANG, Wei-Hua CHIENG, Shyr-Long JENG, Stone CHENG, Fu-Jen HSU, Bin-Han LUE, Chih-Chiang WU, Ching-Wei SHIH