Patents by Inventor Fu-Jier Fahn

Fu-Jier Fahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6534396
    Abstract: Within a method for forming a microelectronic fabrication there is first provided a substrate. There is then formed over the substrate a patterned conductor layer having a topographic variation at a periphery of the patterned conductor layer. There is then formed over the substrate and passivating the topographic variation at the periphery of the patterned conductor layer a planarizing passivation layer formed of a thermally reflowable material. There is then formed upon the planarizing passivation layer a dimensionally stabilizing layer. Finally, there is then thermally annealed the microelectronic fabrication to form from the planarizing passivation layer a thermally annealed planarizing passivation layer. By employing formed upon the planarizing passivation layer the dimensionally stabilizing layer, there is attenuated within the thermally annealed planarizing passivation layer replication of the topographic variation at the periphery of the patterned conductor layer.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: March 18, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Jier Fahn, Kuo-Wei Lin, James Chen, Eugene Cheu, Chien-Shian Peng, Gilbert Fan, Kenneth Lin
  • Patent number: 6194288
    Abstract: A method whereby the region where the field oxide has to be grown is defined with a layer of photoresist. The present invention teaches the implantation of N2 into the layer of silicon dioxide (SiO2) that is not covered by the layer of photoresist. The photoresist is removed and the field oxide (FOX) is grown in the areas from where the photoresist has been removed.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: February 27, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Fu-Jier Fahn, Fang-Chang Liu
  • Patent number: 6171978
    Abstract: This invention relates to the fabrication of integrated circuit devices and more particularly to an improved, graded, silicon oxynitride process step, in order to form an unconventional dielectric layer, having an adjustable effective dielectric constant, for the purpose of fabricating capacitors for both DRAM and Logic technologies. During the special CVD process for the oxynitride layer, its composition is varied such that three distinct regions are created in the direction of film growth. The dielectric property of the lower region is close to silicon oxide, the dielectric property of the upper region is close to silicon oxynitride and the dielectric property of the intermediate transition zone is between that of silicon oxide and oxynitride.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: January 9, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Shih-Chi Lin, Fu-Jier Fahn, Jenq-Dong Sheu