Patents by Inventor Fu-Kuang Frank Chao

Fu-Kuang Frank Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7330477
    Abstract: A system and method for scheduling communications from a communication interface. Each of multiple send queues is associated with a destination and assigned to a logical communication channel. A list of stalled queues identifies those send queues for which a constraint restricts scheduling. When a queue is to be selected for service, a scheduler first attempts to find a member of the stalled queues list that is no longer stalled (e.g., any constraints were satisfied). Such a queue is selected for service if it exists. If there is no such queue, then all logical channels are examined and, from a list of send queues assigned to a selected logical channel, a send queue is selected for servicing. After a queue is scheduled from the stalled queues list, the list of queues assigned to its logical channel is adjusted (e.g., to place the queue at the tail of the list).
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: February 12, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Ariel Hendel, Fu-Kuang Frank Chao
  • Patent number: 7099972
    Abstract: A resource allocation arbitration system. The system includes a plurality of storage devices, a plurality of indicators, and a plurality of mask bits. Each storage device stores requests for resources. Each indicator enables indication of a condition in which the request stored in each storage device is almost empty. Furthermore, the mask bits enable preemption of one request by another request.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: August 29, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Fu-Kuang Frank Chao
  • Patent number: 7085905
    Abstract: A memory system which includes a bank of memory chips, a memory interface, and a memory controller. The memory interface stretches a sample period for data from the bank of memory chips, and provides a sufficiently wide timing margin to enable the memory chips to work reliably across various process conditions.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: August 1, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Fu-Kuang Frank Chao
  • Publication number: 20040120336
    Abstract: A system and method for scheduling communications from a communication interface. Each of multiple send queues is associated with a destination and assigned to a logical communication channel. A list of stalled queues identifies those send queues for which a constraint restricts scheduling. When a queue is to be selected for service, a scheduler first attempts to find a member of the stalled queues list that is no longer stalled (e.g., any constraints were satisfied). Such a queue is selected for service if it exists. If there is no such queue, then all logical channels are examined and, from a list of send queues assigned to a selected logical channel, a send queue is selected for servicing. After a queue is scheduled from the stalled queues list, the list of queues assigned to its logical channel is adjusted (e.g., to place the queue at the tail of the list).
    Type: Application
    Filed: December 24, 2002
    Publication date: June 24, 2004
    Inventors: Ariel Hendel, Fu-Kuang Frank Chao
  • Patent number: 6732199
    Abstract: A system and method for scheduling packet output according to a quality of service (QoS) action specification. A system is provided with a calendar queue with a plurality of bandwidth timeslots, wherein the bandwidth timeslots are organized into groups. A look-up logic circuitry inspects a group of bandwidth timeslots substantially simultaneously and determines from the group a first unoccupied bandwidth timeslot in which a current packet can be scheduled. The look-up logic circuitry also determines a first occupied bandwidth timeslot that contains a next packet to be transmitted.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: May 4, 2004
    Assignee: Watchguard Technologies, Inc.
    Inventors: JungJi John Yu, Chih-Wei Chao, Fu-Kuang Frank Chao
  • Publication number: 20040015670
    Abstract: A memory system which includes a bank of memory chips, a memory interface, and a memory controller. The memory interface stretches a sample period for data from the bank of memory chips, and provides a sufficiently wide timing margin to enable the memory chips to work reliably across various process conditions.
    Type: Application
    Filed: July 18, 2002
    Publication date: January 22, 2004
    Inventor: Fu-Kuang Frank Chao
  • Publication number: 20040006662
    Abstract: A resource allocation arbitration system. The system includes a plurality of storage devices, a plurality of indicators, and a plurality of mask bits. Each storage device stores requests for resources. Each indicator enables indication of a condition in which the request stored in each storage device is almost empty. Furthermore, the mask bits enable preemption of one request by another request.
    Type: Application
    Filed: July 3, 2002
    Publication date: January 8, 2004
    Inventor: Fu-Kuang Frank Chao