Abstract: A synchronous circuit of a receiving device of a wireless transmission system composed of a delaying unit, a multiplier, a matched filter and a checking unit is disclosed. The delaying unit receives a preamble of a baseband signal and delays the preamble that includes a plurality of symbols. Through the multiplier, the symbols of the preamble are multiplied by the symbols of the preamble delayed by the delaying unit so as to generate a plurality of matched data. Then the matched filter matches and filters the matched data to generate a plurality of output data according to a plurality of matched parameters. At last, the checking unit checks these output data to obtain the maximum output data and the corresponding symbol so as to generate a synchronous signal. Therefore, the receiving device demodulates the baseband signal and obtains the data correctly.

Abstract: The present invention relates to a pseudo-random number demodulation circuit of receiving device of wireless communication system. More particularly, it can demodulate the symbol data transmitted from a transmitting device for a wireless communication system. The transmitting device modulates multiple pilot subcarriers and multiple data subcarriers of the symbol data according to a first PN. The present invention uses a first demodulator demodulates all pilot subcarriers and data subcarriers of the symbol data according to a second PN. Further, a splitter splits the symbol data to the pilot subcarriers and the data subcarriers. More, a second demodulator is used to demodulate the data subcarriers according to a third PN. Therefore, the present invention can demodulate the pilot subcarriers and the data subcarriers which have not been modulated.

Abstract: The present invention relates to a frequency-hopping analysis circuit of a receiving apparatus in a wireless transmission system, which includes an RF receiving circuit, a detection circuit, and a matching module. The RF receiving circuit receives an RF signal according to an initial frequency-hopping sequence to produce a baseband signal. The detection circuit detects the signal strength of the baseband signal, and identifies the corresponding piconet group of the baseband signal according to the estimated strength. Then, the matching module matches a preamble of the baseband signal according to a plurality of piconets of the corresponding piconet group of the baseband signal, and gives the corresponding piconet of the baseband signal. Thereby, the corresponding frequency-hopping sequence of the baseband signal is given and is transmitted to the RF receiving circuit for replacing the initial frequency-hopping sequence.

Abstract: The present invention relates to a transceiver puncture circuit of wireless communication system, which is amounted with a control circuit and a clipper module, the puncture module couples to a coding unit of the transceiver. The control circuit bases on a fixed clock signal, results in an enable signal to the coding unit and also results in a selecting signal to the clipper circuit; the coding unit codes an input data as a coding data and transfers the coding data to the clipper module, the coding data comprises a plurality of bit data; the clipper module selects the partial bit data of the bit data according to the selecting signal, and then results in a output data according to the fixed clock signal. Therefore, it achieves that the control circuit synchronously controls a clipper module and a coding unit of the transceiver for improving the deal effect of the transceiver.

Abstract: The present invention is related to a frequency offset estimation circuit of receiving device of wireless transmission system, which includes a delay unit, a multiplier, an angle estimator, a compensation unit, and an arithmetic logic unit. The delay unit receives a preamble symbol of a baseband and delays the preamble symbol, the preamble symbol adjusts by a launcher of the wireless transmission system, and the launcher adjusts the preamble symbol in accordance with a cover sequence. The multiplier multiplies the preamble symbol and after delayed the preamble symbol by the delay unit for producing a first data. The angle estimator estimates the first data for an estimative value of phase shift. The compensation unit determines the estimative value of phase shift to compensate the estimative value of phase shift. The arithmetic logic unit produces a frequency deviation in accordance with after compensated the estimative value of phase shift by the compensation unit.

Abstract: A method of spoke filling for radar scan converter and the spoke filling processing unit for the same are provided, the radar scan converter having a buffer, an overlay processor, and the spoke filling processing unit. The spoke filling processing unit comprises a first multiplexer, a second multiplexer, a timing generator, a data storage unit and a finite state machine. The spoke filling processing unit can effectively fill the spokes while avoiding collision occurrence and, through the finite state machine thereof, can control the electrical circuit operation.