Abstract: A chipset holds a first hardware semaphore to indicate that a processing subsystem is powered off. This first hardware semaphore coordinates power states between a driver and the processing subsystem. The chipset releases the first hardware semaphore when the processing subsystem is powered on. This release allows the driver to operate on a hardware component associated with the processing subsystem. The chipset attempts to acquire the first hardware semaphore by the processing subsystem before powering off. The chipset powers off the processing subsystem upon successfully acquiring the first hardware semaphore.

Abstract: A timing control method for a user equipment (UE) in a wireless communications system, including: obtaining a starting time of a data transmission period from information of a data transmission timing received from a base station of a wireless network; obtaining a starting time of a current data processing period; and adjusting a data processing timing so that the adjusted starting time of the current data processing period is ahead of the starting time of the data transmission period by a predetermined time.

Abstract: A method for Cellular Text Telephone Modem (CTM) signal transmission includes: converting a CTM transmitter signal carried in a first sampling rate to generate a transmission signal carried in a second sampling rate, wherein the second sampling rate is different from the first sampling rate; and outputting the transmission signal carried in the second sampling rate to a CTM receiver.

Abstract: A method for Cellular Text Telephone Modem (CTM) signal transmission includes: converting a CTM transmitter signal carried in a first sampling rate to generate a transmission signal carried in a second sampling rate, wherein the second sampling rate is different from the first sampling rate; and outputting the transmission signal carried in the second sampling rate to a CTM receiver.

Abstract: A timing control method for a user equipment (UE) in a wireless communications system, including: obtaining a starting time of a data transmission period from information of a data transmission timing received from a base station of a wireless network; obtaining a starting time of a current data processing period; and adjusting a data processing timing so that the adjusted starting time of the current data processing period is ahead of the starting time of the data transmission period by a predetermined time.

Abstract: A method and circuit to produce an optimal sampling phase for recovery of a digital signal is achieved. A digital signal is over-sampled by sampling on each phase of a multiple phase clock to generate a sample value per phase. The multiple phase clock may be generated by a DLL. A voted value is determined per phase comprising a majority value of a set of consecutive sample values. Transition phases are sensed. A transition phase is defined as two consecutive voted phases comprising different values. The transition phases are compared to a stored phase state to determine a signal shift direction. The signal shift direction is filtered to generate a state update signal. The stored phase state is updated based on the state update signal. The stored phase state corresponds to an optimal sampling phase for recovery of the digital signal.