Patents by Inventor Fu-To Wang
Fu-To Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240178228Abstract: A semiconductor device and a logic device formed of the semiconductor device are provided. The semiconductor device includes a first field effect transistor (FET), disposed on a semiconductor substrate, and including vertically separated first channel structures formed as thin sheets each having opposite major planar surfaces facing toward and away from the semiconductor substrate; and a second FET, disposed on the semiconductor substrate and overlapped with the first FET. A conductive type of the second FET is complementary to a conductive type of the first FET. Second channel structures of the second FET are separately arranged along a lateral direction, and formed as thin walls.Type: ApplicationFiled: February 7, 2023Publication date: May 30, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Li Chiang, Jer-Fu Wang, Iuliana Radu
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Publication number: 20240173395Abstract: Provided in the present disclosure are a Zika/dengue vaccine and its application thereof. The present disclosure introduces a mutation into the E-protein FL fusion region of the Zika virus or dengue virus. Antigens with said mutations are unable to bind to antibodies that causes ADE. After immunization with the vaccine of the present disclosure acquired from the said antigens, production of FL epitope-induced antibodies can be prevented, thereby reducing or eliminating the ADE effect.Type: ApplicationFiled: November 9, 2020Publication date: May 30, 2024Applicant: Institute of Microbiology, Chinese Academy of SciencesInventors: Fu GAO, Lianpan DAI, Jinghua YAN, Kun XU, Yuxuan HAN, Qihui WANG, Qingrui HUANG, Jinhe LI
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Patent number: 11997935Abstract: A resistive random-access memory (RRAM) device, including a bottom electrode, a high work function layer, a resistive material layer and a top electrode sequentially stacked on a substrate, wherein the resistive material layer includes a bottom part and a top part, first spacers covering sidewalls of the top part and the top electrode, and second spacers covering sidewalls of the bottom part, thereby constituting a RRAM cell.Type: GrantFiled: September 27, 2022Date of Patent: May 28, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Shu-Hung Yu, Chun-Hung Cheng, Chuan-Fu Wang
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Patent number: 11997226Abstract: The present disclosure relates to a cover plate, a display panel and a display terminal. The cover plate includes a first region and a second region surrounding the first region. The second region includes a plurality of side cover plate regions and at least one corner opening region located between two adjacent side cover plate regions. The cover plate includes at least one buffer portion which is filled in the corner opening region.Type: GrantFiled: February 9, 2022Date of Patent: May 28, 2024Assignee: YUNGU (GU'AN) TECHNOLOGY CO., LTD.Inventors: Liuyang Wang, Qi Shan, Liwei Ding, Fu Liao, Yuhua Wu, Hongqi Hou, Jun Wang
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Patent number: 11996298Abstract: A method for processing an integrated circuit includes forming a plurality of transistors. The method utilizes a reversed tone patterning process to selectively drive dipoles into the gate dielectric layers of some of the transistors while preventing dipoles from entering the gate dielectric layers of other transistors. This process can be repeated to produce a plurality of transistors each having different threshold voltages.Type: GrantFiled: August 18, 2022Date of Patent: May 28, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lung-Kun Chu, Jia-Ni Yu, Chun-Fu Lu, Kuo-Cheng Chiang, Chih-Hao Wang
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Publication number: 20240170437Abstract: A package structure is disclosed. The package structure includes a first substrate, a second substrate, a gap, and a directing structure. The second substrate is disposed under the first substrate. The gap is between the first substrate and the second substrate. The gap includes a first region and a second region. The first region is configured to accommodate a filling material. The directing structure is disposed in a flow path of the filling material and configured to reduce a migration of the filling material from the first region to the second region.Type: ApplicationFiled: November 23, 2022Publication date: May 23, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chun Fu KUO, Shang Min CHUANG, Ching Hung CHUANG, Hsu Feng TSENG, Jia Zhen WANG
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Publication number: 20240167888Abstract: In an indoor environment on fire, automatic deployment of sensors disposed on, beneath or over the floor to look upward the ceiling to observe a body of smoke and flame risen near the ceiling allows important information regarding states and dynamics of the body of smoke and flame to be gathered at an early stage of fire (e.g. before arrival of firefighters). By distributing the sensors over the indoor environment, the states and dynamics of the body of smoke and flame are monitored holistically (i.e. as a whole) even at the early stage of fire. Such information is useful to predict development of the fire. In one implementation, a sensor is held in an infrastructure sensor holder mounted on the ceiling during normal time. Upon detecting occurrence of fire, the sensor drops from the holder to land on the floor and orients a sensing direction vertically upward to perform monitoring.Type: ApplicationFiled: December 5, 2023Publication date: May 23, 2024Inventors: Qixin WANG, Xinyan HUANG, Muhammad SHAHEER, Tamzid MOHAMMAD, Xiaoning ZHANG, Mingchun LUO, Li-Ta HSU, Xiqiang WU, Fu XIAO, Asif USMANI
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Publication number: 20240164224Abstract: A ReRAM device includes an interlayer dielectric (ILD), a lower conductive plug, a resistance-switching element (RSE) and an upper conductive plug. The ILD has an upper surface. The lower conductive plug is disposed in the ILD, and has a top surface lower than the upper surface. The RSE is disposed above the top surface and electrically contacts with the top surface. The upper conductive plug is disposed above the RSE and electrically contacts with the RSE.Type: ApplicationFiled: December 16, 2022Publication date: May 16, 2024Inventors: Kai-Jiun CHANG, Yu-Huan YEH, Chuan-Fu WANG
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Patent number: 11984442Abstract: A layout includes a first and a second standard cells abutting along a boundary line. The first cell includes first fins. An edge of the first fins closest to and away from the boundary line by a distance D1. A first gate line over-crossing the first fins protrudes from the edge by a length L1. The second cell includes second fins. An edge of the second fins closest to and away from the boundary line by a distance D2. A second gate line over-crossing the second fins protrudes from the edge by a length L2. Two first dummy gate lines at two sides of the first fins and two second dummy lines at two sides of the second fins are respectively away from the boundary line by a distance S. The lengths L1 and L2, the distances S, D1 and D2 have the relationships: L1?D1?S, L2?D2?S, and D1?D2.Type: GrantFiled: April 8, 2022Date of Patent: May 14, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ruei-Yau Chen, Wei-Jen Wang, Kun-Yuan Wu, Chien-Fu Chen, Chen-Hsien Hsu
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Patent number: 11984478Abstract: A method includes forming a first portion of a spacer layer over a first fin and a second portion of the spacer layer over a second fin, performing a first etching process to recess the first portion of the spacer layer with respect to the second portion of the spacer layer to form first spacers on sidewalls of the first fin, subsequently performing a second etching process to recess the second portion of the spacer layer with respect to the first spacers to form second spacers on sidewalls of the second fin, where the second spacers are formed to a height greater than that of the first spacers, and forming a first epitaxial source/drain feature and a second epitaxial source/drain feature between the first spacers and the second spacers, respectively, where the first epitaxial source/drain feature is larger than that of the second epitaxial source/drain feature.Type: GrantFiled: June 8, 2021Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shu Wen Wang, Chih-Teng Liao, Chih-Shan Chen, Jui Fu Hsieh, Dave Lo
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Patent number: 11984164Abstract: Disclosed herein is an integrated circuit including multiple magnetic tunneling junction (MTJ) cells coupled to a static random access memory (SRAM). In one aspect, the integrated circuit includes a SRAM having a first port and a second port, and a set of pass transistors coupled to the first port of the SRAM. In one aspect, the integrated circuit includes a set of MTJ cells, where each of the set of MTJ cells is coupled between a select line and a corresponding one of the set of pass transistors.Type: GrantFiled: April 14, 2023Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Perng-Fei Yuh, Yih Wang, Ku-Feng Lin, Jui-Che Tsai, Hiroki Noguchi, Fu-An Wu
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Publication number: 20240152162Abstract: An aircraft system includes an aircraft, which further includes at least one propeller to provide a flight power for the aircraft; a communication interface configured to communicate with a parachute; at least one storage medium, storing at least one set of instructions for controlling the aircraft system; and at least one processor in communication with the at least one memory. when the aircraft system is in operation, the at least processor executes the at least one set of instruction to: obtain a propeller locking instruction of the aircraft, and perform a corresponding operation based on the propeller locking instruction. The corresponding operation include a first operation. The first operation, corresponds to a scenario where the aircraft is in a flight state, includes: in response to the propeller locking instruction, the aircraft controlling the at least one propeller to stop and locking the at least one propeller, and deploying the parachute by the aircraft.Type: ApplicationFiled: December 15, 2023Publication date: May 9, 2024Applicant: SZ DJI TECHNOLOGY CO., LTD.Inventors: Kai WANG, Peilu SI, Fu LI
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Publication number: 20240154065Abstract: An optoelectronic device includes a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; a first insulating layer on the second semiconductor layer and including a plurality of first openings exposing the first semiconductor layer, wherein the first openings include a first group and a second group; a third electrode on the first insulating layer and including a first extended portion and a second extended portion, wherein the first extended portion and the second extended portion are respectively electrically connected to the first semiconductor layer through the first group of the first openings and the second group of the first openings, and wherein the number of the first group of the first openings is different from the number of the second group of the first openings; and a plurality of fourth electrodes on the second insulating layer and electrically connected to the second semiconductor layer, wherein in aType: ApplicationFiled: January 11, 2024Publication date: May 9, 2024Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Chien-Chih LIAO, Tzu-Yao TSENG, Tsun-Kai KO, Chien-Fu SHEN
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Publication number: 20240148129Abstract: A mobile device attachment adapted for a mobile device and a container for food or liquid is provided. The mobile device attachment includes a magnetic connecting member and a connecting member. The magnetic connecting member is selectively magnetically connected to the mobile device and adapted to extend in an escaping direction. The connecting member is disposed between the container and the magnetic connecting member. The mobile device has an image capturing range. When the magnetic connecting member extends in the escaping direction, the container, the magnetic connecting member and the connecting member are located outside the image capturing range. Besides, a container including the mobile device attachment is also provided.Type: ApplicationFiled: November 1, 2023Publication date: May 9, 2024Inventors: CHING-FU WANG, CHING-YU WANG, CHE-WEI HSU, JUI-CHEN LU, CHENG-CHE HO
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Publication number: 20240139281Abstract: The present invention relates to the field of biomedicine, and in particular to a use of goji glycopeptide in the preparation of a drug for preventing and/or treating amyotrophic lateral sclerosis. Experimental results prove the use of goji glycopeptide in the preparation of a drug for preventing and/or treating amyotrophic lateral sclerosis.Type: ApplicationFiled: August 21, 2023Publication date: May 2, 2024Applicants: NINGXIA QIPEPTIDE TECHNOLOGY CO., LTDInventors: Weidong LE, Guohui SU, Xiaolan XU, Xiaojiao XU, Libing ZHOU, Li ZHANG, Zhexiong YU, Jinxia WANG, Fu FAN
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Publication number: 20240139944Abstract: The robotic arm operating system includes a control device, a plurality of joint devices and a brake release monitoring device. The control device is used to generate an operation instruction. The joint device is coupled to the control device. Each joint device includes a motor and a driver. The drivers of the joint devices receive the operation instruction to generate corresponding multiple unlocking signals. The unlocking signals are used to release a braking state of the motors of the corresponding joint devices. The brake release monitoring device is coupled to the control device and the joint devices, and includes a plurality of monitoring circuits. When one of the plurality of monitoring circuits does not receive the corresponding unlocking signal, the brake release monitoring device notifies the control device that the operation instruction is not allowed.Type: ApplicationFiled: October 27, 2022Publication date: May 2, 2024Inventors: Hsin-Fu WANG, Shun-Kai CHANG, Yen-Shun HUANG
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Patent number: 11968908Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.Type: GrantFiled: June 30, 2022Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
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Publication number: 20240128233Abstract: A sensor package structure and a manufacturing method thereof are provided. The sensor package structure includes a substrate, a fixing adhesive layer disposed on the substrate, a sensor chip adhered to the fixing adhesive layer, an annular adhering layer disposed on the sensor chip, a light-permeable sheet adhered to the annular adhering layer, and a plurality of metal wires that are electrically coupled to the substrate and the sensor chip. The size of the light-permeable sheet is smaller than that of the sensor chip.Type: ApplicationFiled: June 6, 2023Publication date: April 18, 2024Inventors: CHIA-SHUAI CHANG, WEN-FU YU, BAE-YINN HWANG, WEI-LI WANG, CHIEN-HUNG LIN
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Publication number: 20240128232Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.Type: ApplicationFiled: December 28, 2023Publication date: April 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
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Publication number: 20240130100Abstract: A memory device is provided. The memory device includes a write pass-gate transistor, a read pass-gate transistor, a write word line, and a read word line. The write pass-gate transistor is disposed in a first layer. The read pass-gate transistor is disposed in a second layer above the first layer. The write word line is disposed in a metallization layer above the first layer and electrically coupled to the write pass-gate transistor through a write path. The read word line is disposed in the metallization layer and electrically coupled to the read pass-gate transistor through a read path. The write path is different from the read path.Type: ApplicationFiled: February 1, 2023Publication date: April 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Li Chiang, Jer-Fu Wang, Yi-Tse Hung, Chao-Ching Cheng, Iuliana Radu