Patents by Inventor Fu Yu Huang

Fu Yu Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10212567
    Abstract: A method of utilizing an audio signal to transmit data for conducting electronic transactions includes in a user device, converting user identification data into a first audio signal and transmitting the first audio signal to a base device; in the base device, converting the first audio signal into the user identification data; in the base device, transmitting the user identification data and transaction content to a server device; and in the server device, obtaining authorization of a validation entity by utilizing the user identification data and the transaction content, for obtaining a transaction number and transmitting the transaction number to the base device.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: February 19, 2019
    Assignee: Eason Tech. Co., Ltd.
    Inventors: Fu-Yu Huang, Min-Chun Lin, Feng-Hui Kuan
  • Patent number: 9661442
    Abstract: The invention discloses a method for transmitting digital contents between devices. First digital contents are modulated into an audio signal in a first device, wherein the first digital contents include contact information and at least one index of at least one second digital content. The audio signal is outputted by at least one audio generator of the first device and then received by at least one audio receiver of a second device. The audio signal is demodulated in the second device to make the second device obtain the first digital contents. The second device obtains the at least one second digital content according to the at least one index of the at least one second digital contents through a wired or wireless communication.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: May 23, 2017
    Inventors: Fu-Yu Huang, Min-Chun Lin, Feng-Hui Kuan, Ray-I Chang, Jing-Fa Tsai, Chao-Nan Wang, Wen-Jong Wu
  • Publication number: 20160309403
    Abstract: A control system for detecting air wave is provided and applied to an electronic device. The control system for detecting air wave includes a detecting module, at least one first application and a service module. The detecting module is configured to detect an air wave and transform the air wave into an electronic signal. The service module includes a service scheduling module and a decoding module. The service scheduling module controls the detecting module to obtain the electronic signal. The decoding module decodes the electronic signal to a digital content. The digital content is transmitted to the corresponding first application.
    Type: Application
    Filed: February 25, 2016
    Publication date: October 20, 2016
    Inventors: Fu-Yu Huang, Feng Hui Kuan
  • Publication number: 20130108071
    Abstract: The invention discloses a method for transmitting digital contents between devices. First digital contents are modulated into an audio signal in a first device, wherein the first digital contents include contact information and at least one index of at least one second digital content. The audio signal is outputted by at least one audio generator of the first device and then received by at least one audio receiver of a second device. The audio signal is demodulated in the second device to make the second device obtain the first digital contents. The second device obtains the at least one second digital content according to the at least one index of the at least one second digital contents through a wired or wireless communication.
    Type: Application
    Filed: January 20, 2012
    Publication date: May 2, 2013
    Applicant: KO-CHANG HUNG
    Inventors: Fu-Yu Huang, Min-Chun Lin, Feng-Hui Kuan, Ray-I Chang, Jing-Fa Tsai, Chao-Nan Wang, Wen-Jong Wu
  • Publication number: 20040183179
    Abstract: A package structure for a multi-chip integrated circuit (IC) is disclosed and the structure includes substrate having a position for bonding with chips for chip-bonding and having at least a hole for the passage of a gold wire in the course of wire-bonding, a first chip attached to the substrate with a chip bonding agent and being wire-bonded on the substrate and the chip bonding position being opposite to the 2nd chip with the substrate in-between, and the gold wire of the wire-bonding passed through the hole of the substrate from the substrate bonding pad at the substrate and on the same lateral side of the second chip and being connected to the pin pad of the first chip, at least a second chip being flip-chip bonded onto the substrate and the bonding position being at different sides of the bonding between the substrate and the first chip, and a package body including filler of the second chip extended to cover the hole of the substrate and the first chip and the gold wire connected to the substrate and th
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Inventors: Wen-Lo Shieh, Fu-Yu Huang, Chia-Chieh Hu, Ning Huang, Hui-Pin Chen, Chang-Ming Hsin, Shu-Wan Lu, Tou-Sung Wu, Chih-Yu Tsai, Yu-Tang Su, Mei-Hua Chen, Chia-Ling Lu, Yu-Ju Wang
  • Publication number: 20040082174
    Abstract: A method of wire bonding of a semiconductor device for resolving oxidation of copper bonding pad is disclosed. The method comprises the steps of exposing the copper bonding pad of a wafer which has been completed with semiconductor circuit fabrication; covering the copper bonding pad of the wafer with a protective anti-oxidization film which will be vaporized when heated; performing wire bonding directly without requiring the removal of the protective film, employing ultrasonic vibration energy, pressurizing deformation energy and heat energy in the course of bonding to vaporize the protective film so that the metal wire and the copper pad form a large area intermetallic compound layer for bonding.
    Type: Application
    Filed: October 21, 2003
    Publication date: April 29, 2004
    Inventors: Wen-Lo Shieh, Fu-Yu Huang, Ning Huang, Hui-Pin Chen, Shu-Wan Lu, Zhe-Sung Wu, Chih-Yu Tsai, Mei-Hua Chen, Chia-Ling Lu, Yu-Ju Wang, Yu-Chun Huang, Tzu-Lin Liu, Wen-Tsung Weng, Ya-Hsin Tseng
  • Publication number: 20040082159
    Abstract: A fabrication method for solder bump pattern of rear section wafer package is disclosed and the method includes the steps of: (a) pattern-etching the wafer at a passivation layer for the positioning of the solder bump; (b) depositing the entire under bump metal layer,
    Type: Application
    Filed: March 10, 2003
    Publication date: April 29, 2004
    Inventors: Wen-Lo Shieh, Fu-Yu Huang, Ning Huang, Hui-Pin Chen, Shu-Wan Lu, Zhe-Sung Wu, Chih-Yu Tsai, Mei-Hua Chen, Chia-Ling Lu, Yu-Ju Wang, Yu-Chun Huang, Tzu-Lin Liu, Wen-Tsung Weng, Ya-Hsin Tseng
  • Publication number: 20030164303
    Abstract: A method of metal-electro-plating for IC package substrate comprising the steps of: forming vias on the package substrate coated with copper film on both sides thereof; electro-plating the vias to form electrical conductive holes between the top layer and the bottom layer of the package substrate; coating a resisting agent where the patterns should be formed on the top layer and on the entire bottom layer of the package substrate; etching the pattern to form circuit without plating lines on the top layer of the substrate, and removing the resisting agent; coating with a resisting agent on the top side and the bottom side of the package substrate but the wiring position to be electro-plated as surface finish for wire-bonding electro-plating on the top side of the package substrate not being applied with the resisting agent; electro-plating the substrate with nickel and gold, and removing the resisting agent; fabricating the circuit on the bottom side of the package substrate and coating with a resisting agent
    Type: Application
    Filed: November 7, 2002
    Publication date: September 4, 2003
    Inventors: Fu-Yu Huang, Yu-Chun Huang, Chin-Hui chuang, Ya-Shin Tseng, Chi-Ju Chiang, Pei-Fen Hung, Wei-Yin Lee, Shu-Hui Lo, Che-Chen Chen
  • Publication number: 20030160316
    Abstract: An open-typed multi-chip stack-packaging is disclosed and the packaging comprises a substrate having a first surface and a second surface, at least a through opening formed on the substrate, and including at least two layers of circuitry to electrically transmit signals; at least a first chip positioned on the upper section of the opening of the first surface and a plurality of protruded blocks being soldered onto the circuitry on the first surface of the substrate at the external region of the substrate for electrically connection; at least a second chip stacked onto the first chip and the second chip being connected electrically to the circuitry of the first surface with gold lines; at least a third chip positioned at the lower section of the opening of the second surface and having a size smaller than the first chip, and a plurality of protruded blocks being used to electrically bond with the center position of the first chip, and adhesive being used to fill the first chip and the third chip, and the regio
    Type: Application
    Filed: January 13, 2003
    Publication date: August 28, 2003
    Inventors: Wen-Lo Shieh, Fu-Yu Huang, Ning Huang, Hui-Pin Chen, Shu-Wan Lu, Tou-Sung Wu, Chih-Yu Tsai, Mei-Hua Chen, Chia-Ling Lu, Yu-Ju Wang
  • Patent number: 6567270
    Abstract: A semiconductor chip package with cooling arrangement includes a heat sink adapted for covering at least a semiconductor chip, characterized in that said heat sink has an inverted U-shaped cross section thereby forming a recess at an inner bottom thereof adapted for covering at least a semiconductor chip and a plurality of pins extending downwardly from a circumferential lower edge of said heat sink, each of said pins being formed with a neck, an enlarged head, and an open slot separating said neck and said enlarged head into two portions, whereby the package can rapidly remove heat from the semiconductor chip, filter noise and reduce inductance.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: May 20, 2003
    Assignee: Orient Semiconductor Electronics Limited
    Inventors: Wen-Lo Shieh, Ning Huang, Hui-Pin Chen, Hua-Wen Chiang, Chung-Ming Chang, Feng-Chang Tu, Fu-Yu Huang, Hsuan-Jui Chang, Chia-Chieh Hu, Wen-Long Leu
  • Publication number: 20030059721
    Abstract: A fabrication method of semiconductor packaging and the packaging element is disclosed. A layer of copper is formed on a thick heat-resistant tape and the surface of the copper layer is coated with a light sensitive photoresist. A light source passes through a pre-fabricated circuit negative being performed on the copper layer such that the photoresist is retained on the surface of the copper layer. An etching step is performed so as to obtain a copper wire with circuit diagram. After that, a wire bonding or a flip chip method is used to bind copper wire circuit with the chip. An appropriate packaging method is performed, a packaging element is obtained after the heat-resistant tape is removed.
    Type: Application
    Filed: May 29, 2002
    Publication date: March 27, 2003
    Inventors: Wen-Lo Shieh, Ning Huang, Hui-Pin Chen, Hua-Wen Chiang, Chung-Ming Chang, Feng-Chang Tu, Fu-Yu Huang, Hsuan-Jui Chang, Chia-Chieh Hu, Wen-Long Leu
  • Publication number: 20030035270
    Abstract: A semiconductor chip package with cooling arrangement includes a heat sink adapted for covering at least a semiconductor chip, characterized in that said heat sink has an inverted U-shaped cross section thereby forming a recess at an inner bottom thereof adapted for covering at least a semiconductor chip and a plurality of pins extending downwardly from a circumferential lower edge of said heat sink, each of said pins being formed with a neck, an enlarged head, and an open slot separating said neck and said enlarged head into two portions, whereby the package can rapidly remove heat from the semiconductor chip, filter noise and reduce inductance.
    Type: Application
    Filed: November 19, 2001
    Publication date: February 20, 2003
    Inventors: Wen-Lo Shieh, Ning Huang, Hui-Pin Chen, Hua-Wen Chiang, Chung-Ming Chang, Feng-Chang Tu, Fu-Yu Huang, Hsuan-Jui Chang, Chia-Chieh Hu, Wen-Long Leu
  • Publication number: 20030006268
    Abstract: A device for making metal bumps includes a hard conical tubular member having a vertical passage which is conical in shape and has a larger diameter at a bottom such that a lower portion of the vertical passage is larger than an upper portion of the vertical passage, whereby a metal wire is inserted into the vertical passage of the hard conical tubular member, with a lower end of the metal wire protruded downwardly out of the vertical passage, the lower end of the metal wire is melted to form a ball, the hard conical tubular member is approached to a raised platform formed on a top of a chip, and a load is applied to the metal wire and the metal wire is heated and bonded on the pad of die and ultrasonic energy is applied to deform the melted metal so as to fill up the lower portion of the vertical passage thereby forming a metal bump on the raised platform of the chip, and finally the hard conical tubular member is removed to pull off the necking position between the metal wire and a top of the metal bump the
    Type: Application
    Filed: November 15, 2001
    Publication date: January 9, 2003
    Inventors: Wen-Lo Shieh, Ning Huang, Hui-Pin Chen, Hua-Wen Chiang, Chung-Ming Chang, Feng-Chang Tu, Fu-Yu Huang, Hsuan-Jui Chang, Chia-Chieh Hu, Wen-Long Leu
  • Patent number: 6499648
    Abstract: A device for making metal bumps includes a hard conical tubular member having a vertical conical passage at an upper portion thereof, a bell shaped chamber at a lower portion thereof which is larger than the vertical conical passage in diameter, located under and communicated with the vertical conical passage, and a circular recess which is larger than the bell shaped chamber in diameter, located under and communicated with the bell shaped chamber, thereby forming a capillary tube with a surface.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: December 31, 2002
    Assignee: Orient Semiconductor Electronics Limited
    Inventors: Wen-Lo Shieh, Ning Huang, Hui-Pin Chen, Hua-Wen Chiang, Chung-Ming Chang, Feng-Chang Tu, Fu-Yu Huang, Hsuan-Jui Chang, Chia-Chieh Hu, Wen-Long Leu
  • Publication number: 20020179686
    Abstract: A device for making metal bumps includes a hard conical tubular member having a vertical conical passage at an upper portion thereof, a bell shaped chamber at a lower portion thereof which is larger than the vertical conical passage in diameter, located under and communicated with the vertical conical passage, and a circular recess which is larger than the bell shaped chamber in diameter, located under and communicated with the bell shaped chamber, thereby forming a capillary tube with a surface.
    Type: Application
    Filed: November 19, 2001
    Publication date: December 5, 2002
    Inventors: Wen-Lo Shieh, Ning Huang, Hui-Pin Chen, Hua-Wen Chiang, Chung-Ming Chang, Feng-Chang Tu, Fu-Yu Huang, Hsuan-Jui Chang, Chia-Chieh Hu, Wen-Long Leu
  • Publication number: 20020072216
    Abstract: The present invention relates to a manufacturing method for multilayer high density substrate. The circuit layout of the first layer substrate of the multilayer board requires a high demand of pitch density, and therefore polyimide layer is used to make into polyimide substrate (or other high density polymeric film substrate), and combines with the non-high density multilayer board formed from second layer board (or more layer boards) made of organic substrate. In making the organic multilayer board, the adjacent surface of the first layer polyimide substrate (or high density polymeric film substrate), corresponding to appropriate solder pad position of the first layer polyimide substrate (or high density polymeric film substrate), is formed with a solder bump. Thus, when the individual layer board and the first layer substrate are combined, direct heating and compression are applied, such that the bump and the solder pad are bound and electrically connected.
    Type: Application
    Filed: April 13, 2001
    Publication date: June 13, 2002
    Inventors: Wen Lo Shieh, Fu Yu Huang, Feng Chang Tu, Hui Pin Chen, Ning Huang, Hsuan Jui Chang, Chia-Chieh Hu, Chung Ming Chang, Hua-Wen Chiang, Yung-Cheng Chuang
  • Patent number: 6390356
    Abstract: A method of forming cylindrical bumps on a substrate for integrated circuits includes the steps of: forming copper circuits on a board of a substrate by means of electroplating; covering said board with a screening material; forming openings in said screening material to align with copper circuits on said board, filling pure copper or high melting point metal into said openings by electroplating to form cylindrical projections; forming a layer of solder alloy on an upper end of each of said cylindrical projections to be even with an upper surface of said screening material, and removing said screening material to leave the cylindrical bumps, whereby the engagement operation between the die and the substrate can be facilitated and the manufacture of the die can be easier.
    Type: Grant
    Filed: October 23, 2000
    Date of Patent: May 21, 2002
    Assignee: Orient Semiconductor Electronics Limited
    Inventors: Wen Lo Shieh, Fu Yu Huang, Yung-Cheng Chuang, Chia-Chieh Hu, Hui-Pin Chen, Ning Huang, Feng Chang Tu, Chung Ming Chang, Hua Wen Chiang, Hsuan Jui Chang
  • Patent number: 6358834
    Abstract: A method of forming metal bumps on a wafer includes the steps of adhering a heat-resistant and steady synthetic tape on the top of the wafer, punching holes through the synthetic tape to form a blind hole on the synthetic tape above the under-bump-metallurgy layer (UBM), filling solder paste into the blind hole by a pusher, melting and then cooling the solder paste into a solder block removing the synthetic tape to expose the solder block, and melting the solder block to form a ball-shaped solder bump.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: March 19, 2002
    Assignee: Orient Semiconductor Electronics Limited
    Inventors: Wen Lo Shieh, Fu Yu Huang, Yung-Cheng Chuang, Hsuan Jui Chang, Hui-Pin Chen, Ning Huang, Feng-Chang Tu, Chung-Ming Chang, Hua Wen Chiang, Chia-Chieh Hu
  • Patent number: 6274491
    Abstract: A process of manufacturing thin ball array substrates includes the steps of: using a layer of polyimide film as a carrier, electroplating a thin copper layer on the polyimide film, electroplating a thick copper layer on the thin copper layer, applying photosensitive coating layers on both sides of the carrier, mounting two masks with optically transmissible circuit tracks on two sides of the carrier and then processing the carrier with exposure treatment, processing the carrier with development treatment so as to remove the photosensitive coating layers aligned with the circuit track thereby forming recessed circuit tracks on the photosensitive coating layers, electroplating a copper layer on a top of the carrier thereby forming an additional copper layer on the thick copper layer, etching a bottom of the carrier to remove the upper recessed circuit track thereon, coating the copper layer on the upper recessed circuit track with soldering metallic material so as to make a top of the soldering metallic materia
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: August 14, 2001
    Assignee: Orient Semiconductor Electronics Limited
    Inventors: Wan Le Xie, Fu Yu Huang, Yung-Cheng Chuang, Ning Huang, Chung Ming Chang, Hui-Pin Chen, Chia-Chieh Hu, Feng Chang Tu, Hsuan Jui Chang, Hua Wen Chiang