Patents by Inventor Fuaida Harun
Fuaida Harun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7795712Abstract: An electronic component includes a lead frame, a semiconductor chip and an encapsulating body. The lead frame includes a heat spreader area, a plurality of conductive lead fingers, at least one non-conductive tie bar, and a metal joint. The metal joint connects the at least one non-conductive tie bar to the heat spreader area. The semiconductor chip is provided on a die pad located on the heat spreader area. The encapsulating body covers at least part of the semiconductor chip, at least part of the at least one non-conductive tie bar and part of the lead frame.Type: GrantFiled: September 4, 2008Date of Patent: September 14, 2010Assignee: Infineon Technologies AGInventors: Alvin Wee Beng Tatt, Fuaida Harun, Soon Hock Tong, Robert-Christian Hagen, Yang Hong Heng, Kean Cheong Lee
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Publication number: 20090051017Abstract: An electronic component includes a lead frame, a semiconductor chip and an encapsulating body. The lead frame includes a heat spreader area, a plurality of conductive lead fingers, at least one non-conductive tie bar, and a metal joint. The metal joint connects the at least one non-conductive tie bar to the heat spreader area. The semiconductor chip is provided on a die pad located on the heat spreader area. The encapsulating body covers at least part of the semiconductor chip, at least part of the at least one non-conductive tie bar and part of the lead frame.Type: ApplicationFiled: September 4, 2008Publication date: February 26, 2009Applicant: INFINEON TECHNOLOGIES AGInventors: Beng Tatt Wee, Fuaida Harun, Soon Hock Tong, Robert-Christian Hagen, Yang Hong Heng, Kean Cheong Lee
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Patent number: 7261230Abstract: An improved method of bonding an insulated wire (14) that has one end connected to a first bond pad (16) to a second bond pad (18) includes moving a tip of a capillary (20) holding the bond wire (14) over the surface of the second bond pad (18) such that the bond wire (14) is rubbed between the capillary tip (20) and the second bond pad (18), which tears the bond wire insulation so that at least a portion of a metal core of the wire (14) contacts the second bond pad (18). The wire (14) is then bonded to the second pad (18) using thermocompression bonding. The tip of the capillary (20) is roughened to enhance the tearing of the bond wire insulation.Type: GrantFiled: August 29, 2003Date of Patent: August 28, 2007Assignee: Freescale Semiconductor, Inc.Inventors: Fuaida Harun, Chiaw Mong Chan, Lan Chu Tan, Lau Teck Beng, Kong Bee Tiu, Soo San Yong
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Publication number: 20060231959Abstract: An integrated circuit is packaged using a package substrate that has a bottom side with a regular array of connection points and a top side with the integrated circuit on it. Vias in the package substrate provide electrical connection between the top and bottom sides. The vias have a via capture pad to which a wire may be wire bonded so that the wires from the IC to the substrate top side directly contact the vias at their capture pads without the need for traces from a top side bond pad to a via. The via capture pad is shaped to include at least one sharp edge to improve the ability of a wirebonder with pattern recognition software to locate the capture pad and place the wire.Type: ApplicationFiled: March 17, 2006Publication date: October 19, 2006Inventors: Fuaida Harun, Liang Koh, Lan Tan
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Patent number: 7042098Abstract: An integrated circuit is packaged using a package substrate that has a bottom side with a regular array of connection points and a top side with the integrated circuit on it. Vias in the package substrate provide electrical connection between the top and bottom sides. The vias have a via capture pad to which a wire may be wire bonded so that the wires from the IC to the substrate top side directly contact the vias at their capture pads without the need for traces from a top side bond pad to a via. The via capture pad is shaped to include at least one sharp edge to improve the ability of a wirebonder with pattern recognition software to locate the capture pad and place the wire.Type: GrantFiled: July 7, 2003Date of Patent: May 9, 2006Assignee: Freescale Semiconductor,INCInventors: Fuaida Harun, Liang Jen Koh, Lan Chu Tan
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Patent number: 6933614Abstract: An integrated circuit die (10) has a copper contact (16, 18), which, upon exposure to the ambient air, forms a native copper oxide. An organic material is applied to the copper contact which reacts with the native copper oxide to form an organic coating (12, 14) on the copper contact in order to prevent further copper oxidation. In this manner, further processing at higher temperatures, such as those greater than 100 degrees Celsius, is not inhibited by excessive copper oxidation. For example, due to the organic coating, the high temperature of the wire bond process does not result in excessive oxidation which would prevent reliable wire bonding. Thus, the formation of the organic coating allows for a reliable and thermal resistance wire bond (32, 34). Alternatively, the organic coating can be formed over exposed copper at any time during the formation of the integrated circuit die to prevent or limit the formation of copper oxidation.Type: GrantFiled: September 15, 2003Date of Patent: August 23, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Chu-Chung Lee, Fuaida Harun, Kevin J. Hess, Lan Chu Tan, Cheng Choi Yong
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Publication number: 20050045692Abstract: An improved method of bonding an insulated wire (14) that has one end connected to a first bond pad (16) to a second bond pad (18) includes moving a tip of a capillary (20) holding the bond wire (14) over the surface of the second bond pad (18) such that the bond wire (14) is rubbed between the capillary tip (20) and the second bond pad (18), which tears the bond wire insulation so that at least a portion of a metal core of the wire (14) contacts the second bond pad (18). The wire (14) is then bonded to the second pad (18) using thermocompression bonding. The tip of the capillary (20) is roughened to enhance the tearing of the bond wire insulation.Type: ApplicationFiled: August 29, 2003Publication date: March 3, 2005Inventors: Fuaida Harun, Chiaw Chan, Lan Tan, Lau Beng, Kong Tiu, Soo Yong
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Patent number: 6854637Abstract: An electrical connection for connecting a bond pad of a first device and a bond pad of a second device with an insulated or coated wire. The electrical connection includes a first wirebond securing a first portion of the insulated bond wire to the first device bond pad. A second wirebond secures a second portion of the insulated bond wire to the second device bond pad. A bump is formed over the second wirebond, and the bump is offset from the second wirebond. The offset bump enhances the second bond, providing it with increased wire peel strength.Type: GrantFiled: February 20, 2003Date of Patent: February 15, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Fuaida Harun, Kong Bee Tiu
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Publication number: 20050006734Abstract: An integrated circuit is packaged using a package substrate that has a bottom side with a regular array of connection points and a top side with the integrated circuit on it. Vias in the package substrate provide electrical connection between the top and bottom sides. The vias have a via capture pad to which a wire may be wire bonded so that the wires from the IC to the substrate top side directly contact the vias at their capture pads without the need for traces from a top side bond pad to a via. The via capture pad is shaped to include at least one sharp edge to improve the ability of a wirebonder with pattern recognition software to locate the capture pad and place the wire.Type: ApplicationFiled: July 7, 2003Publication date: January 13, 2005Inventors: Fuaida Harun, Liang Koh, Lan Tan
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Publication number: 20040195696Abstract: An integrated circuit die (10) has a copper contact (16, 18), which, upon exposure to the ambient air, forms a native copper oxide. An organic material is applied to the copper contact which reacts with the native copper oxide to form an organic coating (12, 14) on the copper contact in order to prevent further copper oxidation. In this manner, further processing at higher temperatures, such as those greater than 100 degrees Celsius, is not inhibited by excessive copper oxidation. For example, due to the organic coating, the high temperature of the wire bond process does not result in excessive oxidation which would prevent reliable wire bonding. Thus, the formation of the organic coating allows for a reliable and thermal resistance wire bond (32, 34). Alternatively, the organic coating can be formed over exposed copper at any time during the formation of the integrated circuit die to prevent or limit the formation of copper oxidation.Type: ApplicationFiled: September 15, 2003Publication date: October 7, 2004Inventors: Chu-Chung Lee, Fuaida Harun, Kevin J. Hess, Lan Chu Tan, Cheng Choi Yong
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Publication number: 20040164126Abstract: An electrical connection for connecting a bond pad of a first device and a bond pad of a second device with an insulated or coated wire. The electrical connection includes a first wirebond securing a first portion of the insulated bond wire to the first device bond pad. A second wirebond secures a second portion of the insulated bond wire to the second device bond pad. A bump is formed over the second wirebond, and the bump is offset from the second wirebond. The offset bump enhances the second bond, providing it with increased wire peel strength.Type: ApplicationFiled: February 20, 2003Publication date: August 26, 2004Inventors: Fuaida Harun, Kong Bee Tiu