Patents by Inventor Fugang ZHANG

Fugang ZHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151308
    Abstract: The embodiments of the disclosure provide a thin film transistor device and a manufacturing method thereof, a composite etching solution, and an array substrate, the method includes: forming an active structure material layer including an active material layer and an ohmic contact material layer, and a source/drain material layer on a base substrate; performing a wet etching process on the source/drain material layer and the active structure material layer using a composite etching solution including a first etching solution and a second etching solution, so as to form a source/drain electrode layer and an active structure including an active layer and an ohmic contact layer, wherein the wet etching process includes: etching the source/drain material layer and oxidizing a portion of the active structure material layer, and etching an oxidized portion of the active structure material layer.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 8, 2025
    Applicants: WUHAN BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhaojian WU, Fugang ZHANG, Yadong XU, Xiaoqi ZHENG, Yingying XIA, Rui ZHANG, Dingli YI, Ruihao ZHANG, Shengbiao YANG, Yue ZHANG, Mengxiang SUN, Gang PENG, Mingdi QIAO, Ziheng YANG, Gao LU, Wei DAI, Zhenyu WANG
  • Patent number: 9443889
    Abstract: The present invention provides a method for manufacturing an array substrate, wherein each data line in a plurality of data line groups forms an integral structure with a first shorting bar, and after etching a source-drain component to form a source electrode and a drain electrode, the data line groups which do not correspond to the first shorting bar is disconnected from the first shorting bar. By adopting the method provided by the present invention, electrostatic breakdown in the manufacturing process of the array substrate can be reduced.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: September 13, 2016
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Dalin Xu, JaeYun Jung, Shikai Wang, Keunbum Lee, Fugang Zhang
  • Publication number: 20160118421
    Abstract: The present invention provides a method for manufacturing an array substrate, wherein each data line in a plurality of data line groups forms an integral structure with a first shorting bar, and after etching a source-drain component to form a source electrode and a drain electrode, the data line groups which do not correspond to the first shorting bar is disconnected from the first shorting bar. By adopting the method provided by the present invention, electrostatic breakdown in the manufacturing process of the array substrate can be reduced.
    Type: Application
    Filed: July 17, 2015
    Publication date: April 28, 2016
    Inventors: Dalin XU, JaeYun JUNG, Shikai WANG, Keunbum LEE, Fugang ZHANG