Patents by Inventor Fui Yee Lim

Fui Yee Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11581241
    Abstract: A circuit module (e.g., an amplifier module) includes a module substrate, a thermal dissipation structure, a semiconductor die, encapsulant material, and an interposer. The module substrate has a mounting surface and a plurality of conductive pads at the mounting surface. The thermal dissipation structure extends through the module substrate, and a surface of the thermal dissipation structure is exposed at the mounting surface of the module substrate. The semiconductor die is coupled to the surface of the thermal dissipation structure. The encapsulant material covers the mounting surface of the module substrate and the semiconductor die, and a surface of the encapsulant material defines a contact surface of the circuit module. The interposer is embedded within the encapsulant material. The interposer includes a conductive terminal with a proximal end coupled to a conductive pad of the module substrate, and a distal end exposed at the contact surface of the circuit module.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: February 14, 2023
    Assignee: NXP USA, Inc.
    Inventors: Boon Yew Low, Fernando A. Santos, Li Li, Fui Yee Lim, Lan Chu Tan
  • Publication number: 20220208646
    Abstract: A circuit module (e.g., an amplifier module) includes a module substrate, a thermal dissipation structure, a semiconductor die, encapsulant material, and an interposer. The module substrate has a mounting surface and a plurality of conductive pads at the mounting surface. The thermal dissipation structure extends through the module substrate, and a surface of the thermal dissipation structure is exposed at the mounting surface of the module substrate. The semiconductor die is coupled to the surface of the thermal dissipation structure. The encapsulant material covers the mounting surface of the module substrate and the semiconductor die, and a surface of the encapsulant material defines a contact surface of the circuit module. The interposer is embedded within the encapsulant material. The interposer includes a conductive terminal with a proximal end coupled to a conductive pad of the module substrate, and a distal end exposed at the contact surface of the circuit module.
    Type: Application
    Filed: December 29, 2020
    Publication date: June 30, 2022
    Inventors: Boon Yew Low, Fernando A. Santos, Li Li, Fui Yee Lim, Lan Chu Tan
  • Patent number: 9209081
    Abstract: A semiconductor grid array package has a first housing member with a cavity that has a cavity floor and cavity walls. A semiconductor die is affixed to the cavity floor. A second housing member is molded to the first housing member and covers an interface surface of the die. Electrically conductive runners are mounted to an external surface of the second housing member. The runners have a wire contacting area and an external connector contacting area. Bond wires are selectively bonded to the external connection pads of the semiconductor die and selectively connected to the wire contacting area of the runners. External electrical connectors are mounted to a designated external connector contacting area.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: December 8, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Fui Yee Lim, Weng Foong Yap
  • Patent number: 8941194
    Abstract: A pressure sensor device is assembled by forming cavities on a surface of a metal sheet and then forming an electrically conductive pattern having traces and bumps over the cavities. An insulating layer is formed on top of the pattern and then processed to form exposed areas and die attach areas on the surface of the metal sheet. The exposed areas are plated with a conductive metal and then electrically connected to respective ones of the bumps. A gel is dispensed on the die attach areas and sensor dies are attached to respective die attach areas. One or more additional semiconductor dies are attached to the insulating layer and bond pads of these dies are electrically connected to the exposed plated areas. A molding compound is dispensed such that it covers the sensor die and the additional dies. The metal sheet is removed to expose outer surfaces of the bumps.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: January 27, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Wai Yew Lo, Fui Yee Lim
  • Publication number: 20140231980
    Abstract: A semiconductor grid array package has a first housing member with a cavity that has a cavity floor and cavity walls. A semiconductor die is affixed to the cavity floor. A second housing member is molded to the first housing member and covers an interface surface of the die. Electrically conductive runners are mounted to an external surface of the second housing member. The runners have a wire contacting area and an external connector contacting area. Bond wires are selectively bonded to the external connection pads of the semiconductor die and selectively connected to the wire contacting area of the runners. External electrical connectors are mounted to a designated external connector contacting area.
    Type: Application
    Filed: February 21, 2013
    Publication date: August 21, 2014
    Inventors: Fui Yee Lim, Weng Foong Yap
  • Patent number: 8546169
    Abstract: A pressure sensor device is assembled by forming cavities on a surface of a metal sheet and then forming an electrically conductive pattern having traces and bumps over the cavities. An insulating layer is formed on top of the pattern and then processed to form exposed areas and die attach areas on the surface of the metal sheet. The exposed areas are plated with a conductive metal and then electrically connected to respective ones of the bumps. A gel is dispensed on the die attach areas and sensor dies are attached to respective die attach areas. One or more additional semiconductor dies are attached to the insulating layer and bond pads of these dies are electrically connected to the exposed plated areas. A molding compound is dispensed such that it covers the sensor die and the additional dies. The metal sheet is removed to expose outer surfaces of the bumps.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: October 1, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Wai Yew Lo, Fui Yee Lim