Abstract: A substrate is bonded to a conductive metallic flange via a free-standing heterostructure thermal interface material that includes physically distinct volumes of different conductive materials. The heterostructure thermal interface material (a bimetallic foil, for example) is metallurgically bonded to the bottom of the substrate on one side and metallurgically bonded to the flange on an opposite side. The constituent materials forming the thermal interface material and their dimensions can be chosen to achieve a desired thermal and/or electrical conductivity while allowing the coefficient of thermal expansion (CTE) to be matched to the substrate and/or the flange.

Abstract: A circuit module includes a module substrate with a mounting surface, and a plurality of conductive features and electronic circuitry coupled to the mounting surface. Encapsulant material covers the electronic circuitry and the mounting surface, and an upper surface of the encapsulant material defined a first surface of the circuit module. A plurality of leadframe terminals, each separated from a non-planar leadframe unit, extend from the conductive features at the mounting surface through the encapsulant material toward the first surface of the circuit module. Each of the leadframe terminals is formed from an elongated planar conductive feature of a leadframe unit, and the plurality of leadframe terminals is electrically coupled to the electronic circuitry through the conductive features and the module substrate. Encapsulant divots may extend into the encapsulant material from the first surface of the circuit module, and proximal ends of the leadframe terminals terminate at the encapsulant divots.

Abstract: A circuit module includes a module substrate with a mounting surface, and a plurality of conductive features and electronic circuitry coupled to the mounting surface. Encapsulant material covers the electronic circuitry and the mounting surface, and an upper surface of the encapsulant material defined a first surface of the circuit module. A plurality of leadframe terminals, each separated from a non-planar leadframe unit, extend from the conductive features at the mounting surface through the encapsulant material toward the first surface of the circuit module. Each of the leadframe terminals is formed from an elongated planar conductive feature of a leadframe unit, and the plurality of leadframe terminals is electrically coupled to the electronic circuitry through the conductive features and the module substrate. Encapsulant divots may extend into the encapsulant material from the first surface of the circuit module, and proximal ends of the leadframe terminals terminate at the encapsulant divots.

Abstract: A substrate is bonded to a conductive metallic flange via a free-standing heterostructure thermal interface material that includes physically distinct volumes of different conductive materials. The heterostructure thermal interface material (a bimetallic foil, for example) is metallurgically bonded to the bottom of the substrate on one side and metallurgically bonded to the flange on an opposite side. The constituent materials forming the thermal interface material and their dimensions can be chosen to achieve a desired thermal and/or electrical conductivity while allowing the coefficient of thermal expansion (CTE) to be matched to the substrate and/or the flange.

Abstract: A circuit module (e.g., an amplifier module) includes a module substrate, a thermal dissipation structure, a semiconductor die, encapsulant material, and an interposer. The module substrate has a mounting surface and a plurality of conductive pads at the mounting surface. The thermal dissipation structure extends through the module substrate, and a surface of the thermal dissipation structure is exposed at the mounting surface of the module substrate. The semiconductor die is coupled to the surface of the thermal dissipation structure. The encapsulant material covers the mounting surface of the module substrate and the semiconductor die, and a surface of the encapsulant material defines a contact surface of the circuit module. The interposer is embedded within the encapsulant material. The interposer includes a conductive terminal with a proximal end coupled to a conductive pad of the module substrate, and a distal end exposed at the contact surface of the circuit module.

Abstract: A circuit module (e.g., an amplifier module) includes a module substrate, a thermal dissipation structure, a semiconductor die, encapsulant material, and an interposer. The module substrate has a mounting surface and a plurality of conductive pads at the mounting surface. The thermal dissipation structure extends through the module substrate, and a surface of the thermal dissipation structure is exposed at the mounting surface of the module substrate. The semiconductor die is coupled to the surface of the thermal dissipation structure. The encapsulant material covers the mounting surface of the module substrate and the semiconductor die, and a surface of the encapsulant material defines a contact surface of the circuit module. The interposer is embedded within the encapsulant material. The interposer includes a conductive terminal with a proximal end coupled to a conductive pad of the module substrate, and a distal end exposed at the contact surface of the circuit module.

Abstract: A semiconductor grid array package has a first housing member with a cavity that has a cavity floor and cavity walls. A semiconductor die is affixed to the cavity floor. A second housing member is molded to the first housing member and covers an interface surface of the die. Electrically conductive runners are mounted to an external surface of the second housing member. The runners have a wire contacting area and an external connector contacting area. Bond wires are selectively bonded to the external connection pads of the semiconductor die and selectively connected to the wire contacting area of the runners. External electrical connectors are mounted to a designated external connector contacting area.

Abstract: A pressure sensor device is assembled by forming cavities on a surface of a metal sheet and then forming an electrically conductive pattern having traces and bumps over the cavities. An insulating layer is formed on top of the pattern and then processed to form exposed areas and die attach areas on the surface of the metal sheet. The exposed areas are plated with a conductive metal and then electrically connected to respective ones of the bumps. A gel is dispensed on the die attach areas and sensor dies are attached to respective die attach areas. One or more additional semiconductor dies are attached to the insulating layer and bond pads of these dies are electrically connected to the exposed plated areas. A molding compound is dispensed such that it covers the sensor die and the additional dies. The metal sheet is removed to expose outer surfaces of the bumps.

Abstract: A semiconductor grid array package has a first housing member with a cavity that has a cavity floor and cavity walls. A semiconductor die is affixed to the cavity floor. A second housing member is molded to the first housing member and covers an interface surface of the die. Electrically conductive runners are mounted to an external surface of the second housing member. The runners have a wire contacting area and an external connector contacting area. Bond wires are selectively bonded to the external connection pads of the semiconductor die and selectively connected to the wire contacting area of the runners. External electrical connectors are mounted to a designated external connector contacting area.

Abstract: A pressure sensor device is assembled by forming cavities on a surface of a metal sheet and then forming an electrically conductive pattern having traces and bumps over the cavities. An insulating layer is formed on top of the pattern and then processed to form exposed areas and die attach areas on the surface of the metal sheet. The exposed areas are plated with a conductive metal and then electrically connected to respective ones of the bumps. A gel is dispensed on the die attach areas and sensor dies are attached to respective die attach areas. One or more additional semiconductor dies are attached to the insulating layer and bond pads of these dies are electrically connected to the exposed plated areas. A molding compound is dispensed such that it covers the sensor die and the additional dies. The metal sheet is removed to expose outer surfaces of the bumps.