Patents by Inventor FUJI Electric Co., Ltd.
FUJI Electric Co., Ltd. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140111270Abstract: An A-NPC circuit is configured so that the intermediate potential of two connected IGBTs is clamped by a bidirectional switch including two RB-IGBTs. Control is applied to the turn-on di/dt of the IGBTs during the reverse recovery of the RB-IGBTs. The carrier life time of an n? drift region in each RB-IGBT constituting the bidirectional switch is comparatively longer than that in a typical NPT structure device. A low life time region is also provided in the interface between the n? drift region and a p collector region, and extends between the n? drift region and the p collector region. Thus, it is possible to provide a low-loss semiconductor device, a method for manufacturing the semiconductor device and a method for controlling the semiconductor device, in which the reverse recovery loss is reduced while the reverse recovery current peak and the jump voltage peak during reverse recovery are suppressed.Type: ApplicationFiled: April 15, 2013Publication date: April 24, 2014Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20140055171Abstract: A driver circuit has a detector circuit including a high side detection transistor, a resistor, and a low side detection transistor connected to a high side output transistor and a low side output transistor. A clamping circuit converts a high voltage amplitude change signal generated at a connection point of the high side detection transistor and resistor to a signal clamped to a voltage range applied on the low side. An OR circuit outputs a signal taking the logical sum of an inverted control signal and an output of a low side first stage drive circuit. A level shifter circuit outputs a level-shifted signal of the OR circuit to a high side first stage drive circuit. A second OR circuit outputs a signal wherein the logical sum of an output signal of the clamping circuit and the control signal is inverted to the low side first stage drive circuit.Type: ApplicationFiled: February 14, 2013Publication date: February 27, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventor: Fuji Electric Co., Ltd.
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Publication number: 20130221403Abstract: A semiconductor device and related method of manufacturing a semiconductor device that has an active region in the inner circumference of a chip with a thickness less than that of the outer circumference of the chip in which a termination structure is provided. An n field stop region, a p collector region, and a collector electrode are on the other main surface of an n? drift region. The n field stop region, the p collector region, and the collector electrode extend from the active region to the termination structure. In the termination structure, a silicon oxide film has a position from a first main surface of the n? drift region in a first depth direction substantially the same as the position of the collector electrode from the first main surface of the n? drift region (2) in the first depth direction in the active region.Type: ApplicationFiled: April 9, 2013Publication date: August 29, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: Fuji Electric Co., Ltd.
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Publication number: 20130217178Abstract: A method for manufacturing a thin film photovoltaic cell having a first electrode layer, a photoelectric conversion layer including a plurality of photoelectric conversion cells, and a second electrode layer sequentially formed on a substrate. The method includes calculating a difference between a weighted mean wavelength of spectral sensitivity of the photoelectric conversion layer and a weighted mean wavelength of a spectrum of incident sunlight that is at a place of installation of the thin film photovoltaic cell and is in a wavelength range contributing to power generation by the thin film photovoltaic cell, and determining a structure of the photoelectric conversion cells, such that the difference is confined to a predetermined range.Type: ApplicationFiled: February 15, 2013Publication date: August 22, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: Fuji Electric Co., Ltd.
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Publication number: 20130213302Abstract: An apparatus for depositing a ta-C thin film for a magnetic recording medium includes a film deposition chamber; a plasma beam formation portion for supplying a plasma beam to the film deposition chamber to form the ta-C thin film on a substrate with a magnetic recording layer thereon; a substrate holder rotatably arranged in the film deposition chamber; a tilting member for continuously changing an inclination angle of the plasma beam to a surface of the magnetic recording layer; and a rotating member for rotating the substrate about a rotation axis of the substrate holder. A control member rotates the substrate holder with the substrate thereon and operates the tilting member to continuously change the inclination angle from a minimum inclination angle to a maximum inclination angle according to an increase in film thickness of the ta-C thin film being formed by the plasma beam formation portion.Type: ApplicationFiled: April 8, 2013Publication date: August 22, 2013Applicant: Fuji Electric Co., Ltd.Inventor: Fuji Electric Co., Ltd.
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Publication number: 20130194827Abstract: A switching power supply of certain aspects of the invention includes a minimum dead time generating circuit that generates a minimum dead time from an OFF timing of an ON pulse detected from the voltage across an auxiliary winding of the transformer by a differentiating circuit. An ON width-determining means of a voltage control oscillator is started, after this minimum dead time, into operation to determine the ON width of the semiconductor switch.Type: ApplicationFiled: December 12, 2012Publication date: August 1, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: Fuji Electric Co., Ltd.
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Publication number: 20130196457Abstract: In some aspects of the invention, a circuit pattern of a front surface structure is formed in a front surface of a semiconductor wafer and an alignment mark is formed on the front surface of a semiconductor wafer. A transparent supporting substrate is attached to the front surface of the semiconductor wafer by a transparent adhesive. Then, a resist is applied onto a rear surface of the semiconductor wafer. Then, the semiconductor wafer is mounted on a stage of an exposure apparatus, with the supporting substrate down. Then, the alignment mark formed on the front surface of the semiconductor wafer is recognized by a camera, and the positions of the semiconductor wafer and a photomask are aligned with each other. Then, the resist is patterned. Then, a circuit pattern is formed in the rear surface of the semiconductor wafer.Type: ApplicationFiled: March 13, 2013Publication date: August 1, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130193531Abstract: Provided by some aspects of the invention is a relatively low-cost, relatively highly accurate physical quantity sensor, and a manufacturing method thereof, that relaxes thermal stress from an outer peripheral portion of a diaphragm in a silicon-on-nothing (“SON”) structure. By providing a stress relaxation region (trench groove) in an outer peripheral portion of a diaphragm in a SON structure, there can be, in some aspects of the invention, a benefit of relaxing the transmission to the diaphragm of thermal stress generated by the difference in linear expansion coefficient between a package and chip, and it is possible to relax the transmission to an electronic circuit disposed in an outer peripheral portion of mechanical stress generated by a measured pressure. As a result of this, it is possible to provide a highly accurate physical quantity sensor.Type: ApplicationFiled: December 12, 2012Publication date: August 1, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130193762Abstract: In a three-level power converting apparatus, a U-phase control means of a first control means operates with a control power supply. A control power supply voltage decrease detecting means and a second control means operate with a gate-driving power supply. A U-phase control means conducts PWM operation using a modulation signal ? from a modulation signal generating means and a carrier signal from a carrier signal generating means and generates control signals for a plurality of switching elements. The second control means generates gate signals from the control signals. When the control power supply voltage decrease detecting means delivers a control power supply voltage decrease signal, the second control means generates the gate signals to turn ones of the switching elements OFF and turn others of the switching elements ON for a predetermined period of time.Type: ApplicationFiled: January 11, 2013Publication date: August 1, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: Fuji Electric Co., Ltd.
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Publication number: 20130186742Abstract: A method for manufacturing a magnetic recording medium includes reducing and eliminating impurity gas present in a chamber. A magnetic recording layer is formed and an active material layer is also formed immediately below or immediately above the magnetic recording layer in respective chambers. The active material layer is formed in the same chamber or with a gate opened between the magnetic recording layer chamber and the active material layer chamber.Type: ApplicationFiled: January 14, 2013Publication date: July 25, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130181328Abstract: A semiconductor device is disclosed that has enhanced its electric charge resistance. A first parallel p-n layer is disposed in an element activating part, and a second parallel p-n layer is disposed in an element peripheral edge part. An n? surface area is disposed between the second parallel p-n layer and a first principal face. Two or more p-type guard ring areas are disposed so as to be separate from each other on the first principal face side of the n? surface area. First field plate electrodes and second field plate electrodes are electrically connected to p-type guard ring areas. Second field plate electrodes cover the first field plate electrodes adjacent to each other so as to cover the first principal face between the first field plate electrodes through a second insulating film.Type: ApplicationFiled: December 12, 2012Publication date: July 18, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130181334Abstract: A connector for electrically connecting a chip electrode of a semiconductor element to a lead constituting an external leading terminal of the chip electrode, includes a first connecting part having an interface joined to the chip electrode; a second connecting part having an interface joined to a base end part of the lead; and a plate-shape coupling part for connecting the first connecting part and the second connecting part to each other, and having a step formed on the interface of the first connecting part in a direction away from the chip electrode by a half blanking process.Type: ApplicationFiled: December 6, 2012Publication date: July 18, 2013Applicant: FUJI ELECTRIC CO., LTDInventor: FUJI ELECTRIC CO., LTD
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Publication number: 20130170856Abstract: An electrophotographic photoreceptor apparatus is provided and a method of manufacturing such a photoreceptor. The electrophotographic photoreceptor includes a cylindrical substrate. A photosensitive layer is formed on the cylindrical substrate. The photoreceptor has first surface corrugations with a pitch of 0.4 to 0.6 mm in an axial direction of the photoreceptor. Each of the first surface corrugations has a depth of 3.0 to 5.0 ?m.Type: ApplicationFiled: November 12, 2012Publication date: July 4, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130153955Abstract: A semiconductor device having a p base region and an n+ emitter region that come into contact with an emitter electrode and are selectively provided in a surface layer of an n? drift layer. A gate electrode is provided on a portion of the front surface of the n? drift layer which is interposed between the n+ emitter regions, with a gate insulating film interposed therebetween. In some exemplary embodiments, an n+ buffer layer and a p collector layer which have a higher impurity concentration than the n? drift layer are sequentially provided on a surface of the n? drift layer opposite to the front surface on which the n+ emitter region is provided. The impurity concentration of the n+ buffer layer is equal to or greater than 7×1016 cm?3 and equal to or less than 7×1017 cm?3. Accordingly, it is possible to obtain high field decay resistance.Type: ApplicationFiled: February 13, 2013Publication date: June 20, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: Fuji Electric Co., LTD.
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Publication number: 20130152910Abstract: An internal combustion engine ignition device can determine ignition timing with high precision to perform ignition with high precision even where noise superimposed at the time of rise of current flowing through an ignition coil is generated. In an internal combustion engine ignition device including an output terminal for detecting an internal state such as a coil current, it is possible to prevent generation of pulse noise in the form of chattering at falling and rising edges of a voltage of the output terminal by using a hysteresis comparator, even if noise is superimposed at the time of rise of the coil current. Therefore, a voltage pulse with pulse width of high precision is transmitted to an electronic control unit without the influence of noise, and the ignition timing can be determined properly with high precision.Type: ApplicationFiled: December 12, 2012Publication date: June 20, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130155740Abstract: Aspects of the invention can provide a control method of a power converter that is capable of preventing increase of electromagnetic noise that are caused by simultaneous change of the states of power semiconductor switching elements of the power converter. State changes of ON/OFF pulses that are input to power semiconductor switching elements are detected, and, when the timings of the state changes of any two of the ON/OFF pulses match each other, the state change of either one of the ON/OFF pulses, of which state changes match each other, is delayed.Type: ApplicationFiled: February 12, 2013Publication date: June 20, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130155560Abstract: In a semiconductor device, a surge voltage is lowered on turning OFF of a switching element, and output current is reduced on turning ON of the switching element in a non-saturated condition to achieve a reduced amount of self-heating. The semiconductor device can comprise a semiconductor switching element, an overvoltage protection circuit, and a resistance circuit to transmit a control signal for turning the switching element ON and OFF to a control terminal of the switching element. The semiconductor device can further comprise a voltage detecting switch that receives a signal corresponding to a voltage appearing at the output terminal of the switching element on turning OFF of the switching element, and a gate resistor change-over switch that operates according to a voltage of a timing capacitor connected to the output side of the voltage detecting switch to increase a resistance value of the resistance circuit.Type: ApplicationFiled: November 12, 2012Publication date: June 20, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130149528Abstract: Some aspects of the invention provide an oxide substrate having a flat surface at the atomic layer level, and suited to forming a thin film of a perovskite manganese oxide. One aspect of the invention provides a single-crystal oxide substrate 10 having a single-crystal supporting substrate 1 of (210)-oriented SrTiO3 and a single-crystal underlayer 2 of (LaAlO3)0.3—(SrAl0.5Ta0.5O3)0.7, which is LSAT, formed on the (210) plane surface of the supporting substrate. In another aspect of the present invention, the LSAT underlayer 2A is formed in an amorphous state. Other aspects of the invention are also disclosed.Type: ApplicationFiled: February 12, 2013Publication date: June 13, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130147525Abstract: Embodiments of the invention provide a drive circuit including: a constant current source that generates a constant current; a switching circuit that connects a gate of the insulated gate switching element to a power supply potential side via the constant current source when turning the insulated gate switching element ON and connects the gate of the insulated gate switching element to a reference potential side via a discharge circuit when turning the insulated gate switching element OFF; a gate voltage detection circuit that detects a gate voltage of the insulated gate switching element; and a current mode selection circuit that switches a mode of the constant current source from a normal current mode to a low current consumption mode when detecting, based on the gate voltage detected by the gate voltage detection circuit, that the insulated gate switching element is turned ON.Type: ApplicationFiled: January 10, 2013Publication date: June 13, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.
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Publication number: 20130147553Abstract: In aspects of the invention, at normal operation, an operational amplifier circuit has feedback applied from the output thereof to the input thereof so that currents equal to each other flow in differential pair transistors, respectively. While, in order that currents equal to each other may flow in the differential pair transistors, respectively, for compensating the difference in threshold voltages in the differential pair transistors, a voltage lower by a certain voltage difference than the voltage applied to the gate terminal of the transistor must be applied to the gate terminal of the transistor. From this, the switching of switches, when a virtual short circuit occurs, can make the output voltage of the operational amplifier circuit become a signal in which positive and negative rectangular ripples, with the values thereof being proportional to the value of the certain voltage difference, are superimposed on a true value.Type: ApplicationFiled: November 13, 2012Publication date: June 13, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventor: FUJI ELECTRIC CO., LTD.