Abstract: An information processing apparatus includes a storage unit and a processor. The storage unit stores a private key corresponding to a public key stored in a storage apparatus connected to the information processing apparatus through a network. The processor receives first data from the network. The processor decrypts second data included in the first data using the private key. The processor determines whether a result of the decryption is third data. The processor activates the information processing apparatus when the result of the decryption is the third data.

Abstract: A p-type semiconductor block is made of a p-type thermoelectric conversion material, and has a pillar portion and a connection portion laterally protruding from the pillar portion. In addition, an n-type semiconductor block is made of an n-type thermoelectric conversion material, and has a pillar portion and a connection portion laterally protruding from the pillar portion. The p-type semiconductor block and the n-type semiconductor block are alternately arranged in such a way that the connection portion of the p-type semiconductor block is connected with the pillar portion of the n-type semiconductor block and the connection portion of the n-type semiconductor block is connected with the pillar portion of the p-type semiconductor block. The connection portions and tip-end portions of the pillar portions are made of a thermoelectric conversion material containing metal powder.

Abstract: A computer-readable storage medium storing an image processing program that causes a computer to execute a process includes, synthesizing, for each of frames included in a video image and to be processed, a synthesis image with an image of a synthesis target region existing in the frame by repeatedly executing a calculation using a Poisson's equation on the basis of the image of synthesis target region existing in the frame to be processed and the synthesis image to be replaced with the image of the synthesis target region, and thereby calculating, from an initial value image, a synthesis result image corresponding to a result obtained by synthesizing the synthesis image with the synthesis target region so as to sequentially execute a synthesis process on the frames of the video image; and setting, for each of the frames to be processed, initial values by setting, as the initial value image.

Abstract: A median filtering apparatus and related method for finding out a median from 2r+1 input data, which includes 2(r+1) comparators, a counter, a circuit to obtain a minimum, a register, a state machine, and an adder. 2r+1 comparators of the comparators compare input data with a first predetermined value and compare the 2r+1 input data with an output value of the register. The counter counts the number of input data that are not larger than the first predetermined value or the output value of the register of the input data. The circuit finds out a minimum value of the input data that are larger than the first predetermined value or the output value of the register of the input data and a second predetermined value. The remaining one comparator of the 2(r+1) comparators compares the number counted by the counter with “r”.

Abstract: According to a data collection method, an allocation determination unit detects one or more pairs of virtual machines communicating with each other from virtual machines on the basis of communication data exchanged between the virtual machines. The allocation determination unit selects one of information processing apparatuses, and determines how to reallocate the virtual machines in order that, out of the detected pairs, at least one of paired virtual machines running on a non-selected information processing apparatus runs on the selected information processing apparatus. A control unit reallocates the virtual machines in accordance with the determined reallocation, and controls the selected information processing apparatus so as to collect communication data relayed by the relay unit running on the selected information processing apparatus.

Abstract: When measuring a one-way packet transfer delay between first and second measurement devices in a time-asynchronous manner, the first measurement device transmits first packets each containing a first counter value at a time of transmission; and then transmits a second packet containing a second counter value at the time of the transmission. The second measurement device stores the first counter value extracted from each of the first packets, a third counter value at a time of reception, and reception time stamp information; calculates an incremental ratio between the first counter value and the third counter value per unit time; and calculates an expected fourth counter value at the time of the reception based on the second counter value and the incremental ratio, and obtains the transfer delay based on the calculated expected fourth counter value and an actual fourth counter value at the time of the reception.

Abstract: The compound semiconductor device comprises an i-GaN buffer layer 12 formed on an SiC substrate 10; an n-AlGaN electron supplying layer 16 formed on the i-GaN buffer layer 12; an n-GaN cap layer 18 formed on the n-AlGaN electron supplying layer 16; a source electrode 20 and a drain electrode 22 formed on the n-GaN cap layer 18; a gate electrode 26 formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; a first protection layer formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; and a second protection layer 30 buried in an opening 28 formed in the first protection layer 24 between the gate electrode 26 and the drain electrode 22 down to the n-GaN cap layer 18 and formed of an insulation film different from the first protection layer.

Abstract: An processor includes a cache memory that temporarily retains data stored in a main storage. The processor includes a processing unit that executes an application by using the data retained in the cache memory. The processor includes a storing unit that stores therein update information indicating data that has been updated by the processing unit within the time period specified by the application executed by the processing unit. The processor includes a write back unit that, when the time period specified by the application ends, writes back, to the main storage from the cache memory, data that is from among the data retained in the cache memory and that is indicated by the update information stored in the storing unit.

Abstract: An electronic device includes: a casing provided with a first printed circuit board that includes a first connector; a unit inserted into the casing through a housing opening formed in the casing, the unit including a second printed circuit board with a second connector, a pair of guide rails that guide the second connector towards the first connector; a width direction positioning section that is provided to an end portion on the housing opening side of at least one of the guide rails of the pair of guide rails and that positions the second connector in the unit width direction with respect to the first connector; and a top-bottom direction positioning section that is positioned further towards the first connector side than the width direction positioning section and that positions the second connector in the top-bottom direction with respect to the first connector.

Abstract: Each of two or more base stations notifies a communication controller of information on a first frequency band that the base station uses for radio communication. Based on the information on the first frequency bands acquired from the two or more base stations, the communication controller selects a second frequency band to be used by the two or more base stations to transmit the data with common content, and notifies the two or more base stations of information on the selected second frequency band. The two or more base stations transmit the data with common content based on the information on the second frequency band acquired from the communication controller.

Abstract: A data access control apparatus has a management information table in which identification information of a storage node specified as one to which transmission of a reference request is inhibited and a reference condition are associated with each other. When a reference condition and a reference request are received, a transmission processing unit transmits the received reference condition and a reference request to storage nodes except a storage node associated with the received reference condition in the management information table. A registration processing unit determines, based on a response from each storage node to which the reference request has been transmitted, a storage node in which no data matching the received reference condition is stored, and registers identification information of the determined storage node in the management information table in association with the received reference condition.

Abstract: A first radio communication apparatus includes receiving antennas, an antenna selection processing unit that selects a transmitting antenna from transmitting antennas included in a second radio communication apparatus, generates a set that includes antenna indexes each indicating each of transmitting antennas, rearranges the antenna indexes in sequence starting from an antenna index indicating the selected transmitting antenna, generates a channel matrix in which a column corresponding to the selected transmitting antenna is located at a top, and a selected-channel matrix composed of the column, multiplies an inverse matrix of the channel matrix by the selected-channel matrix to generate an evaluation matrix, rearranges the antenna indexes in the set according to values of elements in the evaluation matrix, and selects an antenna to be used according to the rearranged antenna indexes, and a transmitting unit that transmits an antenna index indicating the selected antenna to the second radio communication appa

Abstract: A semiconductor package includes a substrate with a first surface on which a semiconductor device is mounted and a second surface opposite to the first surface, and a loop heat pipe including an evaporator and attached to the second surface of the substrate, wherein the substrate has a groove structure in the second surface, the groove structure being in contact with a porous wick provided in the evaporator.

Abstract: A security chip is used in a contents data playing device. The security chip includes a storage unit configured to store firmware data including a firmware program, and a firmware update management unit configured to determine whether an update process is to be executed on the firmware data based on a comparison between expiration information set for the firmware data and time information received via a network, in response to a request input to the security chip to acquire a contents key or to decrypt contents data, and to reject the request when the update process is to be executed. The firmware program causes the security chip to function as a contents key acquisition control unit configured to acquire, via the network, the contents key for decrypting the contents data, and a decryption unit configured to decrypt the contents data by using the contents key.

Abstract: A communication control device measures a size of burst data transmitted from a first device through the use of a predetermined protocol in a transport layer. The communication control device selects a protocol ruled by an algorithm with the smallest latency, which is estimated from the measured size of burst data and characteristics of a network, from among plural protocols used in the transport layer. The communication control device terminates the communication of the burst data transmitted through the predetermined protocol from the first device and transmits the burst data to a destination through the use of the selected protocol.

Abstract: The present invention discloses a method for solving the co-existence problem, a base station, user equipment, and system for performing the method. The method for solving the co-existence problem comprises: pre-configuring the information for co-existence working mode by a base station of a first communication system for a user equipment, receiving, by the base station of the first communication system from the user equipment in the first communication system, a mode establishing request for indicating the co-existence problem experienced by the user equipment and providing the assistance information for co-existence working mode in which the user equipment performs a first communication with the base station and performs a second communication with an apparatus in a second communication system which is different from the first communication system in a time-division manner.

Abstract: In a mobile communication system, a relay station connects to a first or second base station, and communicates with a mobile station at a timing corresponding to the destination base station. Before execution of a handover for switching a destination of the relay station from the first base station to the second base station, the relay station transmits a signal regarding the second base station. The mobile station synchronizes with the relay station after execution of the handover, on the basis of the signal regarding the second base station which is received from the relay station before the handover.

Abstract: A system includes one or more memory modules provided with a plurality of operation blocks having a plurality of memory elements which may be simultaneously operated. The system performs write access concurrently by writing data to two or more selected operation blocks. When a fault is detected in one of the two or more operation blocks, access is performed including the write access to two or more operation blocks excluding the operation block in which the fault is detected.

Abstract: A shared memory device transmits information indicating the validity of data to be stored to each information processing apparatus, and acquires information indicating the validity of data that each shared memory device stores. Further, the shared memory device acquires information indicating the on-line state between each information processing device and each shared memory device, and determines whether the multiplexing of the data that the shared memory device stores is guaranteed based on the acquired information.

Abstract: A data transmission apparatus includes a plurality of transmission data generation units that generate a first symbol by attaching one control bit to data of a predetermined bit length or a second symbol including data of a bit length longer than the predetermined bit length by one bit. The data transmission apparatus includes a transmission unit that transmits the first symbol or the second symbol generated by each of the transmission data generation units. At least one transmission data generation unit, in each timing at which the plurality of transmission data generation units generate the first symbol or the second symbol, generates the first symbol and the other transmission data generation units generate the second symbol.