Patents by Inventor Fujitsu Limited

Fujitsu Limited has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140156994
    Abstract: An information processing apparatus includes a storage unit and a processor. The storage unit stores a private key corresponding to a public key stored in a storage apparatus connected to the information processing apparatus through a network. The processor receives first data from the network. The processor decrypts second data included in the first data using the private key. The processor determines whether a result of the decryption is third data. The processor activates the information processing apparatus when the result of the decryption is the third data.
    Type: Application
    Filed: May 6, 2013
    Publication date: June 5, 2014
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20140130838
    Abstract: A p-type semiconductor block is made of a p-type thermoelectric conversion material, and has a pillar portion and a connection portion laterally protruding from the pillar portion. In addition, an n-type semiconductor block is made of an n-type thermoelectric conversion material, and has a pillar portion and a connection portion laterally protruding from the pillar portion. The p-type semiconductor block and the n-type semiconductor block are alternately arranged in such a way that the connection portion of the p-type semiconductor block is connected with the pillar portion of the n-type semiconductor block and the connection portion of the n-type semiconductor block is connected with the pillar portion of the p-type semiconductor block. The connection portions and tip-end portions of the pillar portions are made of a thermoelectric conversion material containing metal powder.
    Type: Application
    Filed: April 9, 2013
    Publication date: May 15, 2014
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130314604
    Abstract: A computer-readable storage medium storing an image processing program that causes a computer to execute a process includes, synthesizing, for each of frames included in a video image and to be processed, a synthesis image with an image of a synthesis target region existing in the frame by repeatedly executing a calculation using a Poisson's equation on the basis of the image of synthesis target region existing in the frame to be processed and the synthesis image to be replaced with the image of the synthesis target region, and thereby calculating, from an initial value image, a synthesis result image corresponding to a result obtained by synthesizing the synthesis image with the synthesis target region so as to sequentially execute a synthesis process on the frames of the video image; and setting, for each of the frames to be processed, initial values by setting, as the initial value image.
    Type: Application
    Filed: November 13, 2012
    Publication date: November 28, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130279824
    Abstract: A median filtering apparatus and related method for finding out a median from 2r+1 input data, which includes 2(r+1) comparators, a counter, a circuit to obtain a minimum, a register, a state machine, and an adder. 2r+1 comparators of the comparators compare input data with a first predetermined value and compare the 2r+1 input data with an output value of the register. The counter counts the number of input data that are not larger than the first predetermined value or the output value of the register of the input data. The circuit finds out a minimum value of the input data that are larger than the first predetermined value or the output value of the register of the input data and a second predetermined value. The remaining one comparator of the 2(r+1) comparators compares the number counted by the counter with “r”.
    Type: Application
    Filed: March 12, 2013
    Publication date: October 24, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227219
    Abstract: An processor includes a cache memory that temporarily retains data stored in a main storage. The processor includes a processing unit that executes an application by using the data retained in the cache memory. The processor includes a storing unit that stores therein update information indicating data that has been updated by the processing unit within the time period specified by the application executed by the processing unit. The processor includes a write back unit that, when the time period specified by the application ends, writes back, to the main storage from the cache memory, data that is from among the data retained in the cache memory and that is indicated by the update information stored in the storing unit.
    Type: Application
    Filed: November 16, 2012
    Publication date: August 29, 2013
    Inventor: FUJITSU LIMITED
  • Publication number: 20130226619
    Abstract: An input support device includes an acquisition unit configured to acquire an attribute of a first document that is an input target of a user, and acquire a second document corresponding to the acquired attribute from a storage unit storing the attribute and the second document relevant to the attribute; a first determination unit configured to determine whether a sentence example, which is stored beforehand in association with reading information, is included in the second document; and a second determination unit configured to determine a display format of the sentence example to be displayed together with the first document when a character string included in the reading information is input to the first document by the user, based on a determination result of the first determination unit.
    Type: Application
    Filed: April 4, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130226969
    Abstract: A data access control apparatus has a management information table in which identification information of a storage node specified as one to which transmission of a reference request is inhibited and a reference condition are associated with each other. When a reference condition and a reference request are received, a transmission processing unit transmits the received reference condition and a reference request to storage nodes except a storage node associated with the received reference condition in the management information table. A registration processing unit determines, based on a response from each storage node to which the reference request has been transmitted, a storage node in which no data matching the received reference condition is stored, and registers identification information of the determined storage node in the management information table in association with the received reference condition.
    Type: Application
    Filed: January 7, 2013
    Publication date: August 29, 2013
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227049
    Abstract: A disclosed system includes a first computer that stores data, a display apparatus that is capable of reading a user identifier, a second computer, and plural third computers. The second computer includes a data storage unit storing first correlation data to correlate a user identifier with at least one third computer, and a controller that refers to the first correlation data upon detecting an event data, identifies a third computer correlated with a first user identifier included in the event data, and transmits the first user identifier to the identified third computer. Each third computer includes a receiver that receives the first user identifier, a storing unit that obtains from the first computer, and stores data identified based on the received first user identifier, and a controller to transmit data corresponding to a second user identifier, which was received from the display apparatus, based on the second user identifier.
    Type: Application
    Filed: December 19, 2012
    Publication date: August 29, 2013
    Inventor: FUJITSU LIMITED
  • Publication number: 20130222058
    Abstract: An amplifier includes an amplifying element that amplifies an input signal; an output terminal that outputs the signal amplified by the amplifying element; a matching circuit disposed in series between the amplifying element and the output terminal, and performing impedance matching; an impedance converter disposed in series between the amplifying element and the matching circuit or between the matching circuit and the output terminal; and a first resonator and a second resonator connected at the ends of the impedance converter.
    Type: Application
    Filed: January 13, 2013
    Publication date: August 29, 2013
    Inventor: Fujitsu Limited
  • Publication number: 20130223487
    Abstract: In a wireless apparatus, a first receiver receives, from a wireless reception apparatus, a transmit beam pattern with better reception quality among transmit beam patterns of a transmitter switched to by a first switching unit. A generation unit generates a transmit beam pattern obtained by rotating a phase of the received transmit beam pattern. A second switching unit switches a transmit beam pattern of the transmitter to the received transmit beam pattern and the generated transmit beam pattern. A second receiver receives, from the wireless reception apparatus, the transmit beam pattern of a combination with better reception quality out of combinations of the switched transmit beam patterns and receive beam patterns switched to by the wireless reception apparatus. A setting unit sets a transmit beam pattern of the transmitter in the transmit beam pattern received by the second receiver.
    Type: Application
    Filed: January 4, 2013
    Publication date: August 29, 2013
    Inventor: FUJITSU LIMITED
  • Publication number: 20130222021
    Abstract: A transmitting apparatus includes a first circuit to which a base clock and a first clock condition are input, the first circuit outputting a first enable signal based on the base clock and the first clock condition; a second circuit to which the base clock and a second clock condition are input, the second circuit outputting a second enable signal based on the base clock and the second clock condition; a first frame processing circuit receiving a first frame input signal and the first enable signal to output a first frame output signal in synchronization with the first enable signal; and a second frame processing circuit receiving a second frame input signal and the second enable signal to output a second frame output signal in synchronization with the second enable signal.
    Type: Application
    Filed: February 19, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Fujitsu Limited
  • Publication number: 20130227579
    Abstract: An information processing apparatus includes a computer configured to set respectively a storage location for each value of a common variable among threads of a thread group having write requests to write the values of the common variable of the threads in a given process, from a specific storage location defined in the write requests, to the storage locations respectively set for the threads; store, for each thread of the thread group, a value of the common variable to the storage location set for the thread; and read out in order of execution of the threads of the thread group defined in the given process and when all the threads in the thread group have ended, each value of the common variable stored at the first storing, and in the order of execution, overwrite a value in the specific storage location with each read value of the common variable.
    Type: Application
    Filed: April 4, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130223010
    Abstract: A semiconductor package includes a substrate with a first surface on which a semiconductor device is mounted and a second surface opposite to the first surface, and a loop heat pipe including an evaporator and attached to the second surface of the substrate, wherein the substrate has a groove structure in the second surface, the groove structure being in contact with a porous wick provided in the evaporator.
    Type: Application
    Filed: April 1, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227538
    Abstract: A security chip is used in a contents data playing device. The security chip includes a storage unit configured to store firmware data including a firmware program, and a firmware update management unit configured to determine whether an update process is to be executed on the firmware data based on a comparison between expiration information set for the firmware data and time information received via a network, in response to a request input to the security chip to acquire a contents key or to decrypt contents data, and to reject the request when the update process is to be executed. The firmware program causes the security chip to function as a contents key acquisition control unit configured to acquire, via the network, the contents key for decrypting the contents data, and a decryption unit configured to decrypt the contents data by using the contents key.
    Type: Application
    Filed: April 11, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227168
    Abstract: A location manager includes a memory and a processor coupled to the memory. The processor executes a process including extracting a combination of a transfer device and a path by using topology information indicating a relation of connections among transfer devices. The process including calculating a sum of an amount of electric power consumed by the transfer device being included in the combination to store the data and an amount of electric power consumed by transfer devices on a path included in the combination to transfer the data. The process including selecting a combination of which the sum of electric power calculated at the calculating is a minimum sum out of the combinations extracted at the extracting. The process including outputting information indicating the combination selected at the selecting.
    Type: Application
    Filed: November 21, 2012
    Publication date: August 29, 2013
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227043
    Abstract: An access restriction device including a processor; and a memory. The processor executes: receiving an email from a transmission source; specifying including analyzing, when a file is attached to the email, information in the file, and specifying a character string from the file; executing including specifying, from a storing unit in which a character string is associated with an access restriction process, an access restriction process that is associated with the character string specified at the specifying the character string, and executing the specified access restriction process on the file; and sending including attaching, instead of the file attached to the email, the file that has been subjected to the access restriction process at the executing to the email, and sending the email to which the file subjected to the access restriction process is attached to a transmission destination of the email.
    Type: Application
    Filed: April 4, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227534
    Abstract: A code converter 11 of a simulation apparatus 1 detects, during the execution of a program in a target CPU, an externally dependent instruction affected by the external environment in each of divided blocks, predicts the execution result of the externally dependent instruction, simulates the instruction execution in the predicted result, and generates a host code in which a code for performance simulation is embedded based on the simulation result. A simulation executor 12 performs performance simulation about instruction execution in the prediction result of the program using the host code, and when the execution result of the externally dependent instruction is different from the setting of the prediction result during the execution, corrects the execution time of the instruction in the prediction result using the execution time of instructions executed before and after the instruction, and the like. A simulation information collector 13 collects and outputs performance simulation information.
    Type: Application
    Filed: April 9, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Fujitsu Limited
  • Publication number: 20130227566
    Abstract: According to a data collection method, an allocation determination unit detects one or more pairs of virtual machines communicating with each other from virtual machines on the basis of communication data exchanged between the virtual machines. The allocation determination unit selects one of information processing apparatuses, and determines how to reallocate the virtual machines in order that, out of the detected pairs, at least one of paired virtual machines running on a non-selected information processing apparatus runs on the selected information processing apparatus. A control unit reallocates the virtual machines in accordance with the determined reallocation, and controls the selected information processing apparatus so as to collect communication data relayed by the relay unit running on the selected information processing apparatus.
    Type: Application
    Filed: December 17, 2012
    Publication date: August 29, 2013
    Inventor: Fujitsu Limited
  • Publication number: 20130225248
    Abstract: A mobile terminal includes a first housing having a first space wall forming a first recess-shaped space and a first wiring opening in the first space wall, a second housing having a second space wall forming a second recess-shaped space and a second wiring opening in the second space wall, a swing connecting member disposed in a space between the first recess-shaped space and the second recess-shaped space facing each other, the swing connecting member having a through hole allowing the first recess-shaped space and the second recess-shaped space to be in communication with each other and being configured to swingably move the first housing and the second housing, and a first wiring member passing through the through hole, and having a first fixing end closely connected to the first wiring opening and a second fixing end closely connected to the second wiring opening.
    Type: Application
    Filed: April 5, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130222177
    Abstract: A detection information memory stores, for each object, detection information that includes a distance to and a traveling speed of an object for each predetermined timing detected by a radar apparatus which detects detection information on the object, and the radar apparatus detects the detection information by receiving a reflected wave of an irradiated radar wave from the object. A predictor predicts, for each object, the detection information to be newly detected by the radar apparatus from a history of the detection information. A tracker tracks the object by identifying the object which is the target of the detection information newly detected using a result of the predictor; a determiner determines whether the object is a fixed object or a moving object. An output unit outputs the detection information on the object determined to be the moving object by the determiner.
    Type: Application
    Filed: January 14, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED