Patents by Inventor Fujitsu Limited

Fujitsu Limited has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140156994
    Abstract: An information processing apparatus includes a storage unit and a processor. The storage unit stores a private key corresponding to a public key stored in a storage apparatus connected to the information processing apparatus through a network. The processor receives first data from the network. The processor decrypts second data included in the first data using the private key. The processor determines whether a result of the decryption is third data. The processor activates the information processing apparatus when the result of the decryption is the third data.
    Type: Application
    Filed: May 6, 2013
    Publication date: June 5, 2014
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20140130838
    Abstract: A p-type semiconductor block is made of a p-type thermoelectric conversion material, and has a pillar portion and a connection portion laterally protruding from the pillar portion. In addition, an n-type semiconductor block is made of an n-type thermoelectric conversion material, and has a pillar portion and a connection portion laterally protruding from the pillar portion. The p-type semiconductor block and the n-type semiconductor block are alternately arranged in such a way that the connection portion of the p-type semiconductor block is connected with the pillar portion of the n-type semiconductor block and the connection portion of the n-type semiconductor block is connected with the pillar portion of the p-type semiconductor block. The connection portions and tip-end portions of the pillar portions are made of a thermoelectric conversion material containing metal powder.
    Type: Application
    Filed: April 9, 2013
    Publication date: May 15, 2014
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130314604
    Abstract: A computer-readable storage medium storing an image processing program that causes a computer to execute a process includes, synthesizing, for each of frames included in a video image and to be processed, a synthesis image with an image of a synthesis target region existing in the frame by repeatedly executing a calculation using a Poisson's equation on the basis of the image of synthesis target region existing in the frame to be processed and the synthesis image to be replaced with the image of the synthesis target region, and thereby calculating, from an initial value image, a synthesis result image corresponding to a result obtained by synthesizing the synthesis image with the synthesis target region so as to sequentially execute a synthesis process on the frames of the video image; and setting, for each of the frames to be processed, initial values by setting, as the initial value image.
    Type: Application
    Filed: November 13, 2012
    Publication date: November 28, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130279824
    Abstract: A median filtering apparatus and related method for finding out a median from 2r+1 input data, which includes 2(r+1) comparators, a counter, a circuit to obtain a minimum, a register, a state machine, and an adder. 2r+1 comparators of the comparators compare input data with a first predetermined value and compare the 2r+1 input data with an output value of the register. The counter counts the number of input data that are not larger than the first predetermined value or the output value of the register of the input data. The circuit finds out a minimum value of the input data that are larger than the first predetermined value or the output value of the register of the input data and a second predetermined value. The remaining one comparator of the 2(r+1) comparators compares the number counted by the counter with “r”.
    Type: Application
    Filed: March 12, 2013
    Publication date: October 24, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130222058
    Abstract: An amplifier includes an amplifying element that amplifies an input signal; an output terminal that outputs the signal amplified by the amplifying element; a matching circuit disposed in series between the amplifying element and the output terminal, and performing impedance matching; an impedance converter disposed in series between the amplifying element and the matching circuit or between the matching circuit and the output terminal; and a first resonator and a second resonator connected at the ends of the impedance converter.
    Type: Application
    Filed: January 13, 2013
    Publication date: August 29, 2013
    Inventor: Fujitsu Limited
  • Publication number: 20130227043
    Abstract: An access restriction device including a processor; and a memory. The processor executes: receiving an email from a transmission source; specifying including analyzing, when a file is attached to the email, information in the file, and specifying a character string from the file; executing including specifying, from a storing unit in which a character string is associated with an access restriction process, an access restriction process that is associated with the character string specified at the specifying the character string, and executing the specified access restriction process on the file; and sending including attaching, instead of the file attached to the email, the file that has been subjected to the access restriction process at the executing to the email, and sending the email to which the file subjected to the access restriction process is attached to a transmission destination of the email.
    Type: Application
    Filed: April 4, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130225089
    Abstract: A first radio communication apparatus includes receiving antennas, an antenna selection processing unit that selects a transmitting antenna from transmitting antennas included in a second radio communication apparatus, generates a set that includes antenna indexes each indicating each of transmitting antennas, rearranges the antenna indexes in sequence starting from an antenna index indicating the selected transmitting antenna, generates a channel matrix in which a column corresponding to the selected transmitting antenna is located at a top, and a selected-channel matrix composed of the column, multiplies an inverse matrix of the channel matrix by the selected-channel matrix to generate an evaluation matrix, rearranges the antenna indexes in the set according to values of elements in the evaluation matrix, and selects an antenna to be used according to the rearranged antenna indexes, and a transmitting unit that transmits an antenna index indicating the selected antenna to the second radio communication appa
    Type: Application
    Filed: January 10, 2013
    Publication date: August 29, 2013
    Inventor: Fujitsu Limited
  • Publication number: 20130227219
    Abstract: An processor includes a cache memory that temporarily retains data stored in a main storage. The processor includes a processing unit that executes an application by using the data retained in the cache memory. The processor includes a storing unit that stores therein update information indicating data that has been updated by the processing unit within the time period specified by the application executed by the processing unit. The processor includes a write back unit that, when the time period specified by the application ends, writes back, to the main storage from the cache memory, data that is from among the data retained in the cache memory and that is indicated by the update information stored in the storing unit.
    Type: Application
    Filed: November 16, 2012
    Publication date: August 29, 2013
    Inventor: FUJITSU LIMITED
  • Publication number: 20130223552
    Abstract: A data transmission apparatus includes a plurality of transmission data generation units that generate a first symbol by attaching one control bit to data of a predetermined bit length or a second symbol including data of a bit length longer than the predetermined bit length by one bit. The data transmission apparatus includes a transmission unit that transmits the first symbol or the second symbol generated by each of the transmission data generation units. At least one transmission data generation unit, in each timing at which the plurality of transmission data generation units generate the first symbol or the second symbol, generates the first symbol and the other transmission data generation units generate the second symbol.
    Type: Application
    Filed: October 31, 2012
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227566
    Abstract: According to a data collection method, an allocation determination unit detects one or more pairs of virtual machines communicating with each other from virtual machines on the basis of communication data exchanged between the virtual machines. The allocation determination unit selects one of information processing apparatuses, and determines how to reallocate the virtual machines in order that, out of the detected pairs, at least one of paired virtual machines running on a non-selected information processing apparatus runs on the selected information processing apparatus. A control unit reallocates the virtual machines in accordance with the determined reallocation, and controls the selected information processing apparatus so as to collect communication data relayed by the relay unit running on the selected information processing apparatus.
    Type: Application
    Filed: December 17, 2012
    Publication date: August 29, 2013
    Inventor: Fujitsu Limited
  • Publication number: 20130221370
    Abstract: The compound semiconductor device comprises an i-GaN buffer layer 12 formed on an SiC substrate 10; an n-AlGaN electron supplying layer 16 formed on the i-GaN buffer layer 12; an n-GaN cap layer 18 formed on the n-AlGaN electron supplying layer 16; a source electrode 20 and a drain electrode 22 formed on the n-GaN cap layer 18; a gate electrode 26 formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; a first protection layer formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; and a second protection layer 30 buried in an opening 28 formed in the first protection layer 24 between the gate electrode 26 and the drain electrode 22 down to the n-GaN cap layer 18 and formed of an insulation film different from the first protection layer.
    Type: Application
    Filed: April 3, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Fujitsu Limited
  • Publication number: 20130227228
    Abstract: An information processing device includes a memory; and a processor that executes a program stored in the memory, wherein the processor executes an operation including: receiving first stream data and second stream data that each include a piece of reception data representing a set of a key and a numerical value, when detecting, from the second stream data, a piece of reception data with the same key as a key of a piece of reception data of the first stream data, obtaining a processing result by adding together numerical values of the pieces of reception data that have the same key, and storing the processing result in the memory.
    Type: Application
    Filed: January 7, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130222556
    Abstract: A stereo picture generating device includes: a feature point extracting unit that extracts feature points from a first picture; a tracking unit that calculates coordinate of each point on a second picture corresponding to each of the feature points; a parameter determining unit that determines plane projective transformation coefficients which include at least one coefficient representing a rotational transfer component and at least one coefficient representing a translation component so as to minimize an evaluation value that includes distance between each of transformed feature points, which are obtained by plane-projective-transforming the feature points on the first picture, and the corresponding point on the second picture, and a weighting term having a value depending on the rotational transfer component; and a transforming unit that plane-projective-transforms the first picture by using the plane projective transformation coefficients, to generate a pair of plane-projective-transformed picture and the
    Type: Application
    Filed: March 22, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227579
    Abstract: An information processing apparatus includes a computer configured to set respectively a storage location for each value of a common variable among threads of a thread group having write requests to write the values of the common variable of the threads in a given process, from a specific storage location defined in the write requests, to the storage locations respectively set for the threads; store, for each thread of the thread group, a value of the common variable to the storage location set for the thread; and read out in order of execution of the threads of the thread group defined in the given process and when all the threads in the thread group have ended, each value of the common variable stored at the first storing, and in the order of execution, overwrite a value in the specific storage location with each read value of the common variable.
    Type: Application
    Filed: April 4, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130226619
    Abstract: An input support device includes an acquisition unit configured to acquire an attribute of a first document that is an input target of a user, and acquire a second document corresponding to the acquired attribute from a storage unit storing the attribute and the second document relevant to the attribute; a first determination unit configured to determine whether a sentence example, which is stored beforehand in association with reading information, is included in the second document; and a second determination unit configured to determine a display format of the sentence example to be displayed together with the first document when a character string included in the reading information is input to the first document by the user, based on a determination result of the first determination unit.
    Type: Application
    Filed: April 4, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227538
    Abstract: A security chip is used in a contents data playing device. The security chip includes a storage unit configured to store firmware data including a firmware program, and a firmware update management unit configured to determine whether an update process is to be executed on the firmware data based on a comparison between expiration information set for the firmware data and time information received via a network, in response to a request input to the security chip to acquire a contents key or to decrypt contents data, and to reject the request when the update process is to be executed. The firmware program causes the security chip to function as a contents key acquisition control unit configured to acquire, via the network, the contents key for decrypting the contents data, and a decryption unit configured to decrypt the contents data by using the contents key.
    Type: Application
    Filed: April 11, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130223010
    Abstract: A semiconductor package includes a substrate with a first surface on which a semiconductor device is mounted and a second surface opposite to the first surface, and a loop heat pipe including an evaporator and attached to the second surface of the substrate, wherein the substrate has a groove structure in the second surface, the groove structure being in contact with a porous wick provided in the evaporator.
    Type: Application
    Filed: April 1, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130223282
    Abstract: The present invention discloses a method for solving the co-existence problem, a base station, user equipment, and system for performing the method. The method for solving the co-existence problem comprises: pre-configuring the information for co-existence working mode by a base station of a first communication system for a user equipment, receiving, by the base station of the first communication system from the user equipment in the first communication system, a mode establishing request for indicating the co-existence problem experienced by the user equipment and providing the assistance information for co-existence working mode in which the user equipment performs a first communication with the base station and performs a second communication with an apparatus in a second communication system which is different from the first communication system in a time-division manner.
    Type: Application
    Filed: March 26, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227357
    Abstract: A system includes one or more memory modules provided with a plurality of operation blocks having a plurality of memory elements which may be simultaneously operated. The system performs write access concurrently by writing data to two or more selected operation blocks. When a fault is detected in one of the two or more operation blocks, access is performed including the write access to two or more operation blocks excluding the operation block in which the fault is detected.
    Type: Application
    Filed: April 1, 2013
    Publication date: August 29, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130227333
    Abstract: A fault monitoring device includes: a controller that is implemented in a computer and controls the computer; a monitored object operated by the computer; a monitor that monitors a fault of the controller and a fault of the monitored object; and a switcher that alternately switches a monitored target by the monitor.
    Type: Application
    Filed: April 3, 2013
    Publication date: August 29, 2013
    Applicant: Fujitsu Limited
    Inventor: Fujitsu Limited