Patents by Inventor Fujitsu Limited

Fujitsu Limited has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130185582
    Abstract: A storage apparatus includes first and second controller modules. The first controller module monitors power states of the first and second controller modules. When the monitoring results indicate that the power state of the first controller module is an ON state and the power state of the second controller module is an ON processing state in which an ON process of switching from OFF to ON is being executed, the first controller module maintains the power state of the first controller module upon detection of a power control signal for controlling the power state of the first controller module.
    Type: Application
    Filed: March 8, 2013
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130181904
    Abstract: A finger position detection device includes a processor; and a memory which stores a plurality of instructions, which when executed by the processor, cause the processor to execute, detecting a hand region that includes a plurality of fingers from an image captured by an image capturing unit that captures an image of the plurality of fingers from in front of the fingers; dividing a first region that is at least a part of the hand region into a plurality of first cells of a first size and extracting, from each of the plurality of first cells, a first feature value that represents a feature of a position of one of the plurality of fingers in a depth direction with respect to the image capturing unit; dividing a second region that is at least a part of the hand region into a plurality of second cells of a second size.
    Type: Application
    Filed: November 6, 2012
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Fujitsu Limited
  • Publication number: 20130182854
    Abstract: An audio coding device that uses a first-channel signal, a second-channel signal, and a plurality of channel prediction coefficients included in a code book, according to which predictive coding is performed on a third-channel signal, the first-channel signal, the second-channel signal, and the third-channel signal being included in a plurality of channels of an audio signal, the device includes, a processor; and a memory which stores a plurality of instructions, which when executed by the processor, cause the processor to execute, determining a distribution of error defined by a difference between the third-channel signal before predictive coding and the third-channel signal after predictive coding as a given curved surface according to the first-channel signal, the second-channel signal, and the third-channel signal before predictive coding; and calculating channel prediction coefficients, included in the code book.
    Type: Application
    Filed: December 13, 2012
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Fujitsu Limited
  • Publication number: 20130182498
    Abstract: A magnetic memory device including a plurality of memory cells, each of which stores therein 2n-valued data by series-connecting MTJ elements whose writing current values and resistance values are different and whose number is n, the magnetic memory device including: a first current driver configured to perform writing on a first MTJ element of a first writing current value in the n MTJ elements; a second current driver configured to perform writing on a second MTJ element of a second writing current value lower than the first writing current value in the n MTJ elements; and a control circuit configured to control so that, in the plural memory cells corresponding to a plurality of addresses, after data writing has been performed on the first MTJ element owing to the first current driver, data writing is performed on the second MTJ element owing to the second current driver.
    Type: Application
    Filed: December 20, 2012
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Fujitsu Limited
  • Publication number: 20130185521
    Abstract: A multiprocessor system includes a master processor, at least one slave processor, and a synchronization unit. The master processor has a first flag indicating whether the master processor is in a task activation accepting state and a second flag reflective of a flag of a slave processor, iteratively updates the first flag at a frequency based on the volume of tasks processed by the master processor, and activates a task on the master processor or the slave processor based on the first flag and the second flag. Each slave processor has a third flag indicating whether the slave processor is in the task activation accepting state and iteratively updates the third flag at a frequency based on the volume of tasks processed by the slave processor. Tasks are allocated to the slave processor by the master processor. The synchronization unit synchronizes the third flag and the second flag.
    Type: Application
    Filed: December 18, 2012
    Publication date: July 18, 2013
    Applicant: Fujitsu Limited
    Inventor: Fujitsu Limited
  • Publication number: 20130182751
    Abstract: There is provided a transmission apparatus which includes a transmitting circuit that receives a bit string in which an input bit string expressed as combination of 0 and 1 is preceded by a 1-bit value 0, computes a difference value between two bits adjacent to each other in the bit string, the difference value being one of among +1, 0, or ?1, and sends the computed difference value, and a receiving circuit that stores a 1-bit value with an initial value of 0, receives the difference value +1, 0, or ?1 sent by the transmitting circuit, calculates a sum of the received difference value and the stored 1-bit value, outputs, as a value of a receiving signal, 1 if the sum is 1 or more or 0 if the sum is 0 or less, and updates the stored 1-bit value to the value of the output receiving signals.
    Type: Application
    Filed: January 9, 2013
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Fujitsu Limited
  • Publication number: 20130185420
    Abstract: A first computer starts to copy data of a virtual machine running on the first computer from the first computer to a second computer. The first computer monitors an index value related to conditions of running the virtual machine on the second computer. The first computer causes, based on the index value, the second computer to start operation of the virtual machine based on the data copied from the first computer to the second computer and terminating operation of the virtual machine running on the first computer.
    Type: Application
    Filed: October 25, 2012
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130183896
    Abstract: An information processing apparatus that executes radio communication under a standardized near field radio communication scheme: stores an application correlated with first specific information specific to the application and first category information indicating a standard-defined category; when using the radio communication, broadcasts a search instruction for a counterpart device conforming to the standardized scheme; receives from a responding counterpart device and correlates with an address thereof, second category information indicating a category of the responding counterpart device, and second specific information stored in a data area to extend a standard of the standardized scheme; includes a buffer unit that stores the received information correlated with the address; and identifies in the buffer unit, second category information and second specific information corresponding to the first category information and the first specific information, and using the address correlated with the identified
    Type: Application
    Filed: March 7, 2013
    Publication date: July 18, 2013
    Applicants: NTT DOCOMO, INC., FUJITSU LIMITED
    Inventors: FUJITSU LIMITED, NTT DOCOMO, INC.
  • Publication number: 20130185238
    Abstract: A splitting device includes a memory and a processor configured to execute a program including a procedure. The procedure includes: setting a halt condition with a number of point data points to halt equal splitting as to a target region for equal splitting to split equally; splitting the target region for equal splitting, until the number of point data points in the target region for equal splitting is less than the halt condition, by taking the target region for equal splitting, as a region where a point data group exists; setting a region having point data of a number or more according to the halt condition obtained by performing the splitting, to the target region for equal splitting; performing the uniform splitting regarding each region group having less point data than the number according to the halt condition obtained by performing the splitting.
    Type: Application
    Filed: January 10, 2013
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130182668
    Abstract: A method for processing carrier state in a carrier aggregation system and a User Equipment (UE) are provided, so as to avoid the random access failure caused by current deactivation mode of the Secondary Component Carrier (SCC). In one embodiment of the present invention, the method includes: performing a random access on a SCCs pair; stopping or ignoring a deactivation timer of a downlink SCC of the SCCs pair before the random access succeeds.
    Type: Application
    Filed: March 7, 2013
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130181270
    Abstract: A semiconductor device includes a capacitor, the capacitor includes: a first semiconductor region of a first conductivity type; a second semiconductor region of the first conductivity type disposed on the first semiconductor region, the second semiconductor region having a higher first-conductivity-type impurity concentration than the first semiconductor region; a third semiconductor region of the first conductivity type disposed on the second semiconductor region, the third semiconductor region including a contact region and having a higher first-conductivity-type impurity concentration than the second semiconductor region; a dielectric film disposed on the third semiconductor region; and an upper electrode disposed on the dielectric film beside the contact region.
    Type: Application
    Filed: November 29, 2012
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130182646
    Abstract: A wireless communication system including a transmitting and receiving device that performs communications with the transmitting device, using a radio frame containing control information and data, wherein the transmitting device includes: a first generating unit that generates first control information able to be estimated by the receiving device; a second generating unit that generates second control information used for control of communication from the receiving device to the transmitting device and unable to be estimated by the receiving device; a multiplexing unit that multiplexes the control and data information so that the first control information is allocated in the control information and the second control information is allocated in the data in the radio frame; a transmitting unit a signal multiplexed by the multiplexing unit; the receiving device includes a receiving unit that receives the signal wherein the second control information is allocated in the data from the transmitting device.
    Type: Application
    Filed: March 8, 2013
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130181851
    Abstract: An encoding method includes searching a search target symbol string within a specific range from the end of a symbol string, which has been utilized for encoding, for a match symbol string corresponding to a beginning symbol string of a symbol string to be encoded, encoding the beginning symbol string based on a distance between the match symbol string and the beginning symbol string, and a length of the match symbol string.
    Type: Application
    Filed: December 20, 2012
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130182969
    Abstract: The present invention discloses a method and apparatus for correcting a corner point of an image and an image processing device. The method includes: determining first candidate corner points of an initial corner point in a first local region; obtaining information related to the image in a second local region; selecting, among the first candidate corner points of the initial corner point, the first candidate corner points meeting a predetermined condition, as second candidate corner points of the initial corner point according to the information; and correcting the initial corner point using the second candidate corner points of the initial corner point. The apparatus is configured to perform the processes of the method. The image processing device includes the apparatus for correcting a corner point of an image. With the technology, a roughly detected corner point can be corrected.
    Type: Application
    Filed: January 14, 2013
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130182720
    Abstract: A frame concatenation apparatus includes a storage unit to store a plurality of frames to be transmitted, a generation unit to generate a concatenated frame including the plurality of frames read out from the storage unit and serially concatenated, and including frame length information on each frame attached thereto, and an attachment unit to attach information for establishing synchronization with a receiver of the concatenated frame, to the concatenated frame.
    Type: Application
    Filed: March 7, 2013
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130183032
    Abstract: An optical transmission apparatus includes an optical transmitter that includes a light emitting element and a driver circuit for the light emitting element, a temperature sensor that detects a temperature of the optical transmitter, and a controller that switches an operation mode of the optical transmitter from a normal mode to a low-power mode so as to reduce a heating effect to the light emitting element and allow an operation of the light emitting element to continue when the temperature detected by the temperature sensor is equal to or higher than a given temperature.
    Type: Application
    Filed: November 6, 2012
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Fujitsu Limited
  • Publication number: 20130181981
    Abstract: An image drawing apparatus includes a drawing position judging unit configured to judge a figure drawn on the scan line to be processed and extract each of vertexes constituting the judged figure, an vertex information reading unit configured to read vertex information, an image generating unit configured to generate graphics data of the scan line, and a line buffer configured to store the graphics data, wherein the vertex information reading unit includes a cache memory, a cache tag configured to store an address storing the vertex information when the vertex information is stored in the cache memory, and a control unit configured to refer to the cache tag, and read the vertex information from the address of the cache memory when the address is stored, and store the vertex information in the cache memory and store the address in the cache tag when the address is not stored.
    Type: Application
    Filed: November 21, 2012
    Publication date: July 18, 2013
    Inventor: Fujitsu Limited
  • Publication number: 20130185300
    Abstract: A dividing device includes: a memory configured to store a program including a procedure; and a processor configured to execute the program, the procedure including: extracting correlation information from source code of software, the information correlating relationships between an originating entity of the relationship and a receiving entity of the relationship, which are identified by dependent relationships of a group of entities, which is the group of elements that structure the software, and dividing the group of entities into clusters, so as to be include in the cluster a lot of the dependent relationship which a weight related to the dependent relationships is large, based on the weight related to the dependent relationships identified by the correlation information extracted by the extracting.
    Type: Application
    Filed: January 14, 2013
    Publication date: July 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Fujitsu Limited
  • Publication number: 20130177109
    Abstract: There is provided a signal detector which includes a correlation emphasis unit configured to generate correlation emphasis signals corresponding to the respective fixed intervals, an autocorrelation matrix generation unit configured to generate an autocorrelation matrix, a noise power estimation unit configured to estimate noise power in the correlation emphasis signals, a noise power matrix generation unit configured to generate, a noise power matrix having noise power components, a noise removal unit configured to remove an influence of noise from the autocorrelation matrix, an eigenvalue calculation unit configured to calculate an eigenvalue of the autocorrelation matrix from which the influence of noise has been removed by the noise removal unit, and a signal judgment unit configured to determine whether a signal transmitted from an external apparatus is included in the received signals.
    Type: Application
    Filed: January 3, 2013
    Publication date: July 11, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130176156
    Abstract: A comparator includes: a differential amplifier circuit to operate based on a clock signal and output a first intermediate output and a second intermediate output corresponding to a first input signal and a second input signal respectively; and a differential latch circuit to operate based on the clock signal and vary a state based on the first intermediate output and the second intermediate output, the differential latch circuit having a controllable sensitivity with respect to a state variation of the first intermediate output and the second intermediate output.
    Type: Application
    Filed: November 7, 2012
    Publication date: July 11, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED