Patents by Inventor Fuk Ng

Fuk Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070247189
    Abstract: A field-programmable object array integrated circuit employs a course gain architecture comprising a core array of highly optimized silicon objects that are individually programmed and synchronously connected via high performance parallel communications structures permitting the user to configure the device to implement a variety of very high performance algorithms. The high level functions available in the objects combined with the unique interconnect structures enables performance superior to existing field programmable solutions while maintaining and enhancing the flexibility. A consistent peripheral “donut” structure around the core of each object makes them interchangeable to build up complex circuits without redesign of standard objects.
    Type: Application
    Filed: December 5, 2006
    Publication date: October 25, 2007
    Applicant: MathStar
    Inventors: Doug Phil, Ronald Bell, Kevin Atkinson, David Trawick, Fuk Ng, Liem Nguyen
  • Publication number: 20060136531
    Abstract: A method and apparatus are provided for aligning data in a binary word. A coded address is provided for each bit of the binary word. Each coded address is modified as a function of a logic state of the respective bit of the binary word to produce respective modified addresses. A shift control word is generated based on bit positions at which the modified addresses have a predetermined logic state. Bits in the binary word are shifted as a function of the shift control word to produce an aligned binary word.
    Type: Application
    Filed: July 6, 2004
    Publication date: June 22, 2006
    Applicant: MathStar, Inc.
    Inventor: Fuk Ng
  • Publication number: 20050154771
    Abstract: A method and apparatus are provided for performing a Boolean logic tree function on all bits of a multiple-bit binary input data word having a plurality of bit positions. Each bit has one of first and second complementary logic states. A modified data word is formed by packing all the bits of the input data word having the first logic state into a first contiguous set of bit positions in the modified data word and all the bits of the input data word having the second logic state into a second contiguous set of the bit positions in the modified data word. The number of bit positions in the first and second sets is greater than or equal to zero. A result of the Boolean logic tree function is generated based on a pattern of the first and second logic states in the modified data word.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 14, 2005
    Applicant: MathStar, Inc.
    Inventors: Fuk Ng, Liem Nguyen