Patents by Inventor Ful L. Ni

Ful L. Ni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Decoder arrangement of a memory cell array
    Patent number: 7123537
    Abstract: A hybrid memory cell array including a preferable arrangement of a row decoder is proposed, and in the same manner of addressing a memory cell in the memory array a high access speed of the memory cell and high integration layout of a memory chip can be achieved. A hybrid memory cell includes a plurality of memory cells that each includes an electronic circuit to store binary logic values, a plurality of word lines, a plurality of bit lines, a row decoder arranged in the memory cell array to enable the plurality of word lines and select a memory cell on a same word line, and a column decoder arranged outside the memory cell array to enable the plurality of bit lines and select a memory cell on a same bit line.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: October 17, 2006
    Assignee: Macronix International Co., Ltd.
    Inventors: Tom D. Yiu, Ful L. Ni
  • Decoder arrangement of a memory cell array
    Publication number: 20030210583
    Abstract: A hybrid memory cell array including a preferable arrangement of a row decoder is proposed, and in the same manner of addressing a memory cell in the memory array a high access speed of the memory cell and high integration layout of a memory chip can be achieved.
    Type: Application
    Filed: March 14, 2003
    Publication date: November 13, 2003
    Applicant: Macronix International Co., Ltd.
    Inventors: Tom D. Yiu, Ful L. Ni