Abstract: A liquid crystal blind includes a transparent first electrode layer, a transparent second electrode layer intersecting with the first electrode layer, and a liquid crystal cell formed between the first electrode layer and the second electrode layer, wherein the liquid crystal blind has an irradiation pattern, and a voltage is applied between the first electrode layer and the second electrode layer, thereby setting an irradiation area adapted to apply irradiation light to a semiconductor substrate and determining the irradiation pattern.

Abstract: A semiconductor device has a semiconductor substrate having a main surface including a first region and a second region, and an interlayer dielectric film formed over the first region and the second region. A bonding pad, a power source line, a test pattern or the like is formed in the first region, and a logic circuit, an analog circuit, a memory circuit or the like is formed in the second region. The interlayer dielectric film has a maximum thickness over the first region, and a thickness that is about 90-50% of the maximum thickness over the second region. The interlayer dielectric film defines a first through hole formed over the first region and a second through hole formed over the second region. An aperture area of the first through hole is greater than that of the second through hole. As a result, the range of the focus margin for forming the first through hole covers the range of the focus margin for forming the second through hole.

Abstract: A semiconductor device has a first region, a second region and a border region between the first region and the second region. The semiconductor device has an interlayer dielectric layer, covering at least the first region and the second region. A first wiring layer is located in the first region and defines a relatively small pattern. A second wiring layer is located in the second region and defines a relatively large pattern that is wider than the small pattern. A first dummy pattern is formed in the first region and a second dummy pattern is formed in the border region. The interlayer dielectric layer includes a planarization silicon oxide film. The planarization silicon oxide film is one of a silicon oxide film formed by a polycondensation reaction between a silicon compound and hydrogen peroxide, an organic SOG (Spin On Glass) film an inorganic SOG film and a silicon oxide film formed by reacting an organic silane with ozone or water.

Abstract: A semiconductor device has a semiconductor substrate having a main surface including a first region and a second region, and an interlayer dielectric film formed over the first region and the second region. A bonding pad, a power source line, a test pattern or the like is formed in the first region, and a logic circuit, an analog circuit, a memory circuit or the like is formed in the second region. The interlayer dielectric film has a maximum thickness over the first region, and a thickness that is about 90-50% of the maximum thickness over the second region. The interlayer dielectric film defines a first through hole formed over the first region and a second through hole formed over the second region. An aperture area of the first through hole is greater than that of the second through hole. As a result, the range of the focus margin for forming the first through hole covers the range of the focus margin for forming the second through hole.