Patents by Inventor Fumihiko Higuchi
Fumihiko Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8251011Abstract: An apparatus, which performs a plasma process on a target substrate by using plasma, includes first and second electrodes in a process chamber to oppose each other. An RF field, which turns a process gas into plasma by excitation, is formed between the first and second electrodes. An RF power supply, which supplies RF power, is connected to the first or second electrode through a matching circuit. The matching circuit automatically performs input impedance matching relative to the RF power. A variable impedance setting section is connected to a predetermined member, which is electrically coupled with the plasma, through an interconnection. The impedance setting section sets a backward-direction impedance against an RF component input to the predetermined member from the plasma. A controller supplies a control signal concerning a preset value of the backward-direction impedance to the impedance setting section.Type: GrantFiled: May 31, 2007Date of Patent: August 28, 2012Assignee: Tokyo Electron LimitedInventors: Yohei Yamazawa, Manabu Iwata, Chishio Koshimizu, Fumihiko Higuchi, Akitaka Shimizu, Asao Yamashita, Nobuhiro Iwama, Tsutomu Higashiura, DongSheng Zhang, Michiko Nakaya, Norikazu Murakami
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Patent number: 7527016Abstract: An apparatus, which performs a plasma process on a target substrate by using plasma, includes first and second electrodes in a process chamber to oppose each other. An RF field, which turns a process gas into plasma by excitation, is formed between the first and second electrodes. An RF power supply, which supplies RF power, is connected to the first or second electrode through a matching circuit. The matching circuit automatically performs input impedance matching relative to the RF power. A variable impedance setting section is connected to a predetermined member, which is electrically coupled with the plasma, through an interconnection. The impedance setting section sets a backward-direction impedance against an RF component input to the predetermined member from the plasma. A controller supplies a control signal concerning a preset value of the backward-direction impedance to the impedance setting section.Type: GrantFiled: July 10, 2003Date of Patent: May 5, 2009Assignee: Tokyo Electron LimitedInventors: Yohei Yamazawa, Manabu Iwata, Chishio Koshimizu, Fumihiko Higuchi, Akitaka Shimizu, Asao Yamashita, Nobuhiro Iwama, Tsutomu Higashiura, Dongsheng Zhang, Michiko Nakaya, Norikazu Murakami
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Publication number: 20070236148Abstract: An apparatus, which performs a plasma process on a target substrate by using plasma, includes first and second electrodes in a process chamber to oppose each other. An RF field, which turns a process gas into plasma by excitation, is formed between the first and second electrodes. An RF power supply, which supplies RF power, is connected to the first or second electrode through a matching circuit. The matching circuit automatically performs input impedance matching relative to the RF power. A variable impedance setting section is connected to a predetermined member, which is electrically coupled with the plasma, through an interconnection. The impedance setting section sets a backward-direction impedance against an RF component input to the predetermined member from the plasma. A controller supplies a control signal concerning a preset value of the backward-direction impedance to the impedance setting section.Type: ApplicationFiled: May 31, 2007Publication date: October 11, 2007Inventors: Yohei Yamazawa, Manabu Iwata, Chishio Koshimizu, Fumihiko Higuchi, Akitaka Shimizu, Asao Yamashita, Nobuhiro Iwama, Tsutomu Higashiura, DongSheng Zhang, Michiko Nakaya, Norikazu Murakami
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Patent number: 7192532Abstract: A tungsten silicide layer (104) is etched by plasma etching using Cl2+O2 gas as etching gas. When etching of the tungsten silicide layer (104) is ended substantially, etching gas is switched to Cl2+O2+NF3 and over etching is performed by plasma etching. Etching process is ended under a state where a polysilicon layer (103) formed beneath the tungsten silicide layer (104) is slightly etched uniformly. Residual quantity of the polysilicon layer (103) can be made uniform as compared with prior art and a high quality semiconductor device can be fabricated stably.Type: GrantFiled: February 27, 2002Date of Patent: March 20, 2007Assignee: Tokyo Electron LimitedInventors: Akiteru Koh, Toshihiro Miura, Takayuki Fukasawa, Akitaka Shimizu, Masato Kushibiki, Asao Yamashita, Fumihiko Higuchi
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Publication number: 20050227494Abstract: A method and system for trimming a feature on a substrate is described. During a chemical treatment of the substrate, the substrate is exposed to a gaseous chemistry, such as HF/NH3, under controlled conditions including surface temperature and gas pressure. An inert gas is also introduced, and the flow rate of the inert gas is selected in order to affect a target trim amount during the trimming of the feature.Type: ApplicationFiled: March 30, 2004Publication date: October 13, 2005Applicant: Tokyo Electron LimitedInventors: Fumihiko Higuchi, Hiroyuki Takahashi, Akiteru Ko, Hongyu Yue, Asao Yamashita, Hiromitsu Kambara
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Publication number: 20050106868Abstract: An etching method for plasma etching a polysilicon film layer on a gate oxide film formed on a silicon substrate by introducing a processing gas into an airtight processing chamber comprises a main etching step for etching, by applying high frequency powers to the upper and the lower electrode, the polysilicon film in a depth direction of openings of a mask pattern serving as a mask, and an overetching step for removing, after the main etching step, residual parts of the polysilicon film, wherein in the middle of the main etching step, the high frequency power applied to the upper electrode is lowered down to a specific power level or lower, and the polysilicon film is etched until a part of the gate oxide film is exposed. Anisotropy in the profile can be improved while enhancing the selectivity of etching, and total etching rate can be prevented from being lowered.Type: ApplicationFiled: January 31, 2003Publication date: May 19, 2005Inventors: Asao Yamashita, Fumihiko Higuchi, Takashi Enomoto
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Publication number: 20050045588Abstract: A tungsten silicide layer (104) is etched by plasma etching using Cl2+O2 gas as etching gas. When etching of the tungsten silicide layer (104) is ended substantially, etching gas is switched to Cl2+O2+NF3 and over etching is performed by plasma etching. Etching process is ended under a state where a polysilicon layer (103) formed beneath the tungsten silicide layer (104) is slightly etched uniformly. Residual quantity of the polysilicon layer (103) can be made uniform as compared with prior art and a high quality semiconductor device can be fabricated stably.Type: ApplicationFiled: February 27, 2002Publication date: March 3, 2005Inventors: Akiteru Koh, Toshihiro Miura, Takayuki Fukasawa, Akitaka Shimizu, Masato Kushibiki, Asao Yamashita, Fumihiko Higuchi
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Publication number: 20050014372Abstract: When etching a silicon layer 210 with a processing gas containing a mixed gas constituted of HBr gas, and O2 gas and SiF4 gas and further mixed with both of or either of SF6 gas and NF3 gas by using a pre-patterned mask having a silicon oxide film layer 204 inside an airtight processing container 102, high-frequency power with a first frequency is applied from a first high-frequency source 118 and high-frequency power with a second frequency lower than the first frequency is applied from a second high-frequency source 138 to a lower electrode 104 on which a workpiece is placed. Through this etching process, holes or grooves achieving a high aspect ratio are formed in a desirable shape at the silicon layer.Type: ApplicationFiled: June 25, 2004Publication date: January 20, 2005Inventors: Satoshi Shimonishi, Takanori Matsumoto, Katsumi Horiguchi, Kenji Yamamoto, Fumihiko Higuchi
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Publication number: 20040035365Abstract: An apparatus, which performs a plasma process on a target substrate by using plasma, includes first and second electrodes in a process chamber to oppose each other. An RF field, which turns a process gas into plasma by excitation, is formed between the first and second electrodes. An RF power supply, which supplies RF power, is connected to the first or second electrode through a matching circuit. The matching circuit automatically performs input impedance matching relative to the RF power. A variable impedance setting section is connected to a predetermined member, which is electrically coupled with the plasma, through an interconnection. The impedance setting section sets a backward-direction impedance against an RF component input to the predetermined member from the plasma. A controller supplies a control signal concerning a preset value of the backward-direction impedance to the impedance setting section.Type: ApplicationFiled: July 10, 2003Publication date: February 26, 2004Inventors: Yohei Yamazawa, Manabu Iwata, Chishio Koshimizu, Fumihiko Higuchi, Akitaka Shimizu, Asao Yamashita, Nobuhiro Iwama, Tsutomu Higashiura, Dongsheng Zhang, Michiko Nakaya, Norikazu Murakami
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Patent number: 5560804Abstract: In plasma-etching a polysilicon layer of a semiconductor wafer where the polysilicon layer is formed on an SiO.sub.2 film, plasma of a processing gas including a halogen element containing gas and a gas containing oxygen or nitrogen is generated, and a predetermined portion of the polysilicon layer is selectively exposed in plasma, thereby etching the portion.Type: GrantFiled: January 30, 1995Date of Patent: October 1, 1996Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi LimitedInventors: Fumihiko Higuchi, Yoshio Fukasawa
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Patent number: 5554249Abstract: A magnetron plasma etching system has a plurality of processing chambers connected to a common transfer chamber. Each processing chamber has a pair of counter electrodes for generating an electric field and a magnet mechanism for generating a magnetic field having an N-S axis crossing the electric field. All magnetic fields are rotated in the same plane. The rotation of the magnetic fields is controlled by a controller. When one of the magnetic fields is rotated, the other magnetic fields are rotated at equal speed such that the directions of N-S axes thereof are parallel and identical to that of the one of the magnetic fields.Type: GrantFiled: February 28, 1995Date of Patent: September 10, 1996Assignee: Tokyo Electron LimitedInventors: Makoto Hasegawa, Tsuyoshi Saito, Fumihiko Higuchi, Hideaki Amano, Katsunori Naitoh, Takashi Tozawa, Tatsuya Nakagome, Keiki Ito, Kouji Suzuki
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Patent number: 5411631Abstract: According to this invention, a dry etching method includes the step of sequentially forming an SiO.sub.2 film, an Al--Si--Cu thin film, and a photoresist on an Si substrate to sequentially form a mask pattern, the step of etching the Al--Si--Cu thin film by RIE using a gas mixture of Cl.sub.2 and BCl.sub.3 as an etching gas, and the step of removing etching residues by a sputter effect obtained by the plasma of the BCl.sub.3 gas.Type: GrantFiled: November 12, 1993Date of Patent: May 2, 1995Assignee: Tokyo Electron LimitedInventors: Masaru Hori, Haruo Okano, Michishige Aoyama, Masao Ito, Kei Hattori, Fumihiko Higuchi, Yoshifumi Tahara
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Patent number: 5314573Abstract: The present invention provides a dry etching method for achieving a satisfactory anisotropic etching of, for example, a semiconductor wafer, particularly, a polysilicon layer formed on the wafer. In the present invention, a mixed gas comprising a first gas containing Br and a second gas containing a halogen element other than Br, e.g., a mixed gas consisting of a HBr gas and a HCl gas, is introduced into a vacuum chamber. The mixed gas is converted into plasma by applying a high frequency power to an upper electrode 5. The plasma region is irradiated, as desired, with an ultraviolet light. The semiconductor wafer is etched with the plasma. The etching is carried out under optimum conditions. For example, the surface temperature of the semiconductor wafer, i.e., workpiece, is maintained at a level falling within a range of between 70.degree. C. and 120.degree. C. Also, the flow rate ratio of the mixed gas is suitably controlled.Type: GrantFiled: May 20, 1992Date of Patent: May 24, 1994Assignee: Tokyo Electron LimitedInventors: Fumihiko Higuchi, Yoshio Fukasawa