Patents by Inventor Fumihiko Sano

Fumihiko Sano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070247997
    Abstract: A sufficient S/N ratio in reproduction of an optical disk is achieved without complexing a circuit structure even if a data recording speed relative to the optical disk is increased. When data is recorded into an optical disk, in an information recording and reproduction device, both a first light beam and a second light beam are emitted at the same time. A sub-actuator section is provided in addition to a main actuator for correcting the displacement of light collecting spots caused by the displacement between the optical axis of the first beam and the optical axis of the second beam. Only the optical axis of the second light beam is adjusted by the sub-actuator section.
    Type: Application
    Filed: August 12, 2005
    Publication date: October 25, 2007
    Applicant: Pioneer Corporation
    Inventors: Naoharu Yanagawa, Fumihiko Sano
  • Patent number: 7227948
    Abstract: An encryption apparatus for block data, comprises a first processing unit randomizing the block data in units of first portions obtained by dividing the block data, and a second processing unit diffusing the block data output from the first processing unit with respect to a second portion of the block data which is wider than the first portion. The first processing unit comprises first nonlinear processing units nonlinearly transforming the block data in units of the first portions. The second processing unit comprises a first linear diffusion processing unit linearly diffusing the second portion of the block data. At least one of the first nonlinear processing units comprises second nonlinear processing units nonlinearly transforming the block data in units of the first portions, and a second linear diffusion processing unit linearly diffusing the second portion of the block data.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: June 5, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Ohkuma, Hirofumi Muratani, Shinichi Kawamura, Fumihiko Sano
  • Patent number: 7209556
    Abstract: An encryption apparatus for block data, comprises a first processing unit randomizing the block data in units of first portions obtained by dividing the block data, and a second processing unit diffusing the block data output from the first processing unit with respect to a second portion of the block data which is wider than the first portion. The first processing unit comprises first nonlinear processing units nonlinearly transforming the block data in units of the first portions. The second processing unit comprises a first linear diffusion processing unit linearly diffusing the second portion of the block data. At least one of the first nonlinear processing units comprises second nonlinear processing units nonlinearly transforming the block data in units of the first portions, and a second linear diffusion processing unit linearly diffusing the second portion of the block data.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: April 24, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Ohkuma, Hirofumi Muratani, Shinichi Kawamura, Fumihiko Sano
  • Patent number: 7194090
    Abstract: Expanded key schedule circuit for common key encryption system in which expanded keys are used in a predetermined order in data randomizing process for encryption and in a reversed order in data randomizing process for decryption, comprises round processing circuits connected in series. The round processing circuits subject the common key or sub key of a previous stage to a round function to output a sub key. The sub key of the last stage is equal to the common key. The expanded keys are generated from the sub keys.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: March 20, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hirofumi Muratani, Masahiko Motoyama, Kenji Ohkuma, Fumihiko Sano, Shinichi Kawamura
  • Publication number: 20070058805
    Abstract: An encryption apparatus for block data, comprises a first processing unit randomizing the block data in units of first portions obtained by dividing the block data, and a second processing unit diffusing the block data output from the first processing unit with respect to a second portion of the block data which is wider than the first portion. The first processing unit comprises first nonlinear processing units nonlinearly transforming the block data in units of the first portions. The second processing unit comprises a first linear diffusion processing unit linearly diffusing the second portion of the block data. At least one of the first nonlinear processing units comprises second nonlinear processing units nonlinearly transforming the block data in units of the first portions, and a second linear diffusion processing unit linearly diffusing the second portion of the block data.
    Type: Application
    Filed: October 31, 2005
    Publication date: March 15, 2007
    Inventors: Kenji Ohkuma, Hirofumi Muratani, Shinichi Kawamura, Fumihiko Sano
  • Patent number: 7039184
    Abstract: An encryption/decryption unit includes a first data encryption/decryption section for performing an encryption or decryption process, a first data substitution section for performing data substitution of an output from the first encryption/decryption section according to a predetermined permutation table, a second data encryption/decryption section for performing an encryption or decryption process for an output from the first data substitution section, a second data substitution section for performing data substitution of an output from the second data encryption/decryption section according to a predetermined permutation table, and a third data encryption/decryption section for performing an encryption or decryption process for an output from the second data substitution section.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: May 2, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fumihiko Sano, Shinichi Kawamura, Hideo Shimizu
  • Patent number: 6985582
    Abstract: An encryption/decryption unit includes a first data encryption/decryption section for performing an encryption or decryption process, a first data substitution section for performing data substitution of an output from the first encryption/decryption section according to a predetermined permutation table, a second data encryption/decryption section for performing an encryption or decryption process for an output from the first data substitution section, a second data substitution section for performing data substitution of an output from the second data encryption/decryption section according to a predetermined permutation table, and a third data encryption/decryption section for performing an encryption or decryption process for an output from the second data substitution section.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: January 10, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fumihiko Sano, Shinichi Kawamura, Hideo Shimizu
  • Publication number: 20050276902
    Abstract: A method for producing a cooked rice having not only a composite flavor to be generated when an edible oil, an egg and cooked rice are simultaneously heated but also an egg flavor which is excellent in storage stability of the flavor. A mixture in which an egg liquid and an edible oil are mixed with each other is heated and foamed and, then, cooked rice is charged in the thus-foamed mixture and, thereafter, heat-cooked. It is preferable that the above-described mixture is a mixture in which, after an egg yolk liquid and an edible oil are mixed with each other, an egg white liquid or a whole egg liquid is further added. Further, in an egg content in the mixture, it is appropriate that an egg white component is in the range, based on 100 parts by weight of an egg yolk component, of from 10 to 200 parts by weight. Further, it is preferable that charging of the cooked rice is performed at the time a yield of an egg content deprived of an edible oil content in the mixture in a foamed state is 60 to 85%.
    Type: Application
    Filed: June 8, 2005
    Publication date: December 15, 2005
    Applicant: AJINOMOTO CO.,INC.
    Inventors: Fumihiko Sano, Tatuya Yamamoto, Kenji Tomita
  • Publication number: 20050266133
    Abstract: A method of preparing industrially and inexpensively fried rice having nice-smelling, well-harmonized taste, soft on the inner side of the grains of the cooked rice and lightly separated at the surfaces thereof, and also suited to be freeze-preserved is disclosed. The method of preparing fried rice, including a rice washing step, a rice immersion step, a rice cooking step and a rice frying step. In this method, two frying steps 11, 15 are carried out in at least two stages out of a stage between a rice washing step 10 and rice immersion step 13, a stage between the immersion step 13 and cooking step 14, an intermediate stage of the cooking stage 14, and a latter stage of the cooking step 14, for example, in a stage between the washing step 10 and immersion step 13, and the latter stage of the cooking step 14.
    Type: Application
    Filed: May 24, 2005
    Publication date: December 1, 2005
    Applicant: AJINOMOTO CO., INC.
    Inventors: Teruo Kobayashi, Tatuya Yamamoto, Fumihiko Sano, Naoki Matsubara
  • Patent number: 6940975
    Abstract: A pair of a pattern of a mask and a mask pattern obtained by bit inversion of the mask is prepared for each round function in a data scrambler. Every time encryption is to be performed, one mask pattern of the pair is randomly selected by a switch, and an exclusive OR of an input to an S-box and the selected mask pattern is calculated. In addition, an exclusive OR of an output from the S-box and bits of inverse permutation of the mask is calculated. The exclusive ORs are calculated in advance and stored as a table in the S-box. Furthermore, an exclusive OR of the output from each round function and a mask is calculated and concealed. The influence of the mask is removed by calculating the exclusive OR with the mask again on the next round.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: September 6, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Kawamura, Fumihiko Sano
  • Patent number: 6917684
    Abstract: The subkey data generating unit 101 has two different subkey key generation processes. When encrypting a (T*n)th plaintex block (where T denotes a predetermined cycle and n is a positive integer), sixteen sets of subkey data are generated. In all other cases, two sets of subkey data are generated. The encrypting unit 100 encrypts the plaintex using the generated sixteen or two sets of subkey data.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: July 12, 2005
    Assignees: Matsushita Electric Industrial Co., Ltd., Kabushiki Kaisha Toshiba
    Inventors: Makoto Tatebayashi, Kaoru Yokota, Motoji Ohmori, Fumihiko Sano, Naoki Endo
  • Publication number: 20050129818
    Abstract: A thin rice sheet with a thickness of 10 mm or less which maintains a soft and full mouthfeel and a smooth surface shape of boiled rice and has appropriate strength and flexibility is disclosed. Rice rinsed in a rice rinsing step 11 is boiled with hot water for a short period of time in a first heating step 12 to produce surface-gelatinized rice. In a dipping and draining step 13, the surface-gelatinized rice is put on a bamboo basket, immediately cooled with water, and left to stand for a few minutes to make the surface half-dry. Then, in a measuring step 14, a weight of the surface-gelatinized rice is measured for sectioning. In a shaping step 15, the sectioned surface-gelatinized rice is lightly kneaded, and then extended to form a surface-gelatinized rice sheet. In a steam heating step 17a of a second heating step 17, the surface-gelatinized rice sheet is steamed.
    Type: Application
    Filed: December 10, 2004
    Publication date: June 16, 2005
    Applicant: AJINOMOTO CO., INC.
    Inventors: Tatuya Yamamoto, Fumihiko Sano, Kouju Matsuo
  • Patent number: 6891950
    Abstract: There are disclosed an extended key generator, encryption/decryption unit, and storage medium, in which as each of key transform functions, a transform process is done by an S box (substitution table) on the basis of a first key obtained from the inputted key, and an adder computes a corresponding one of extended keys on the basis of a value obtained by shifting the transformed result of the S box to the left, and a second key obtained from the inputted key.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: May 10, 2005
    Assignees: Kabushiki Kaisha Toshiba, Matsushita Electric Industrial Co., Ltd.
    Inventors: Motoji Oomori, Kaoru Yokota, Tsutomu Sekibe, Makoto Tatebayashi, Fumihiko Sano, Shinichi Kawamura
  • Patent number: 6876059
    Abstract: A semiconductor integrated circuit device according to an embodiment of the present invention has an MIM structure capacitor connected between a power source potential electrode wiring and a ground potential electrode wiring each via at least one interlayer connection wiring.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: April 5, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fumihiko Sano
  • Publication number: 20050019465
    Abstract: Cooked rice having an improved quality and reduced amounts of broken cooked rice and/or crumbled cooked rice and suppressed unpleasant odors such as rice bran odor and old rice odor may be prepared by subjected rice to a steaming treatment at a temperature of from 100 to 250° C. for a period of from 0.1 to 60 seconds and, then, boiling the steamed rice.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 27, 2005
    Applicant: Ajinomoto Co., Inc.
    Inventors: Tatuya Yamamoto, Fumihiko Sano, Kouju Matsuo
  • Patent number: 6842523
    Abstract: In an encryption apparatus for encrypting a data body to contain an encrypted data body in transmission data and transmitting the transmission data to a receiver, the transmission data includes sender's key recovery data obtained by encrypting recovery information for recovering a key for decrypting the encrypted data body to allow a key recovery agent registered by a sender to decrypt the recovery information, and receiver's key recovery data obtained by encrypting the recovery information for recovering the key for decrypting the encrypted data body to allow a key recovery agent registered by a receiver to decrypt the recovery information.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: January 11, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akito Niwa, Shinichi Kawamura, Megumi Aoki, Toshiaki Saisho, Tatsuya Ishihara, Fumihiko Sano, Satomi Hori
  • Patent number: 6818241
    Abstract: The invention relates to a method of preparing cooked rice, comprising steaming raw rice having a water content of less than 30% by weight and then boiling the steamed rice, to cooked rice prepared according to the present method, and to cooked rice types comprising the cooked rice.
    Type: Grant
    Filed: January 22, 2001
    Date of Patent: November 16, 2004
    Assignee: Ajinomoto Co., Inc.
    Inventors: Ryoji Nakamura, Fumihiko Sano, Yoshio Ogata, Takeshi Nishinomiya, Shigeru Toba
  • Patent number: 6819764
    Abstract: There is provided a data processor wherein a plain text is encrypted to a cipher text by using a encryption key and/or a cipher text is decrypted to a plain text by using a decryption key, which device is constructed of a plurality of key conversion functions fk sequentially connected, which each are an involution type, and which conduct key conversion processing and output extended keys based on the key for encryption or decryption, or key conversion results, a key conversion section in which the key conversion results are sequentially transferred between the key conversion functions in the order or the reverse order, a plurality of round functions fr sequentially connected, which are an involution type, and which conducts encryption and/or decryption by using extended keys, and a data randomize section in which processing results in the round functions fr are sequentially transferred between the round functions fr in the order or the reverse order.
    Type: Grant
    Filed: August 24, 1999
    Date of Patent: November 16, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Shimizu, Fumihiko Sano
  • Publication number: 20040212040
    Abstract: A semiconductor integrated circuit device according to an embodiment of the present invention has an MIM structure capacitor connected between a power source potential electrode wiring and a ground potential electrode wiring each via at least one interlayer connection wiring.
    Type: Application
    Filed: July 14, 2003
    Publication date: October 28, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Fumihiko Sano
  • Publication number: 20040165721
    Abstract: An encryption/decryption unit includes a first data encryption/decryption section for performing an encryption or decryption process, a first data substitution section for performing data substitution of an output from the first encryption/decryption section according to a predetermined permutation table, a second data encryption/decryption section for performing an encryption or decryption process for an output from the first data substitution section, a second data substitution section for performing data substitution of an output from the second data encryption/decryption section according to a predetermined permutation table, and a third data encryption/decryption section for performing an encryption or decryption process for an output from the second data substitution section.
    Type: Application
    Filed: March 2, 2004
    Publication date: August 26, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Fumihiko Sano, Shinichi Kawamura, Hideo Shimizu