Patents by Inventor Fumihiro Abe

Fumihiro Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010055279
    Abstract: A multiplexing device allowing audio conferencing via a network with simplified circuit structure is disclosed. After combining received signals from all the participants to produce a combined signal, a signal of each of the participants is subtracted from the combined signal to produce a conference signal for a corresponding participant.
    Type: Application
    Filed: May 17, 2001
    Publication date: December 27, 2001
    Applicant: NEC CORPORATION
    Inventor: Fumihiro Abe
  • Patent number: 5333306
    Abstract: In an information processing system comprising a central processing unit connected to a bus for carrying out data processing in accordance with a program and a main memory unit connected to the bus for memorizing data, a data protection unit is connected to the bus. The data protection unit protects the data in the main memory unit from destruction by supplying the main memory unit with a write inhibit signal when the program runs away.
    Type: Grant
    Filed: January 28, 1992
    Date of Patent: July 26, 1994
    Assignee: NEC Corporation
    Inventor: Fumihiro Abe
  • Patent number: 5126972
    Abstract: Addresses of a main memory, which have been accessed by a central processing unit, are ascertained during the execution of a program stored in the main memory. A decoder is provided for receiving a predetermined number of lower n bits of main memory address bits and generates an output consisting of 2.sup.n bits (n is a positive integer). A memory includes a plurality of binary cells which correspond to memory cells of the main memory on a one by one basis. A logic circuit receives first and second data. The first data is the output of the decoder and the second data is one cell data retrieved from the memory. The logic circuit implements logical sum on the first and second data and superimposes the output thereof on the memory cell from which the second data has been derived. After the execution of the program is terminated, the contents of the memory are dumped.
    Type: Grant
    Filed: August 8, 1990
    Date of Patent: June 30, 1992
    Assignee: NEC Corporation
    Inventor: Fumihiro Abe