Patents by Inventor Fumihiro Hatano

Fumihiro Hatano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080155496
    Abstract: A program for execution by a computer that includes a plurality of processor elements, the program comprising: a parallel execution program part to assign the plurality of processor elements one-to-one to a plurality of program parts so that the plurality of program parts are executed in parallel with each other; an execution history obtaining part to obtain and hold an execution history of each of the plurality of program parts; a parallel execution judgment part to judge whether or not to execute the plurality of program parts in parallel with each other, in accordance with the obtained execution history; and a processor element assignment control part to perform a control to determine whether to assign the plurality of processor elements to the plurality of program parts, depending on a result of the judgment made by the parallel execution judgment part.
    Type: Application
    Filed: December 17, 2007
    Publication date: June 26, 2008
    Inventors: Fumihiro Hatano, Akira Tanaka
  • Publication number: 20070277162
    Abstract: A high-sped block is formed by generating and connecting a new basic block (contains an intermediate code obtained by performing variable replacing processing to a path replacement target variable of the intermediate code on a hot path of an original partial program and contains a branching intermediate code where a branching instruction on the hot path is converted so as to execute the hot path), and a basic block with an intermediate code for restoring value of path guarantee variable among the path replacement target variables to a value of an original variable. When an execution result of a conditional branching intermediate code is true, the speeding up of the original program is achieved through executing the basic block, and performing dependency analysis and dependency generation between the intermediate codes in the high-speed block and scheduling of the instructions.
    Type: Application
    Filed: May 24, 2007
    Publication date: November 29, 2007
    Inventors: Akira Tanaka, Fumihiro Hatano, Tomohiro Yamana, Masaaki Mineo
  • Publication number: 20060130012
    Abstract: To provide a compiler device that generates an executable program for a computer capable of executing two or more instructions in parallel, without using compensation code in trace scheduling. The compiler device generates the executable program that causes the computer to concurrently execute code which is a substantially direct translation of the source program, and code generated by optimizing a sequence of instructions of a most frequent execution path in the source program.
    Type: Application
    Filed: November 9, 2005
    Publication date: June 15, 2006
    Inventors: Fumihiro Hatano, Akira Tanaka