Patents by Inventor Fumihiro Koba

Fumihiro Koba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080070406
    Abstract: A resist film is formed on a substrate. A conductive layer is formed on the resist film. The resist film is exposed to an electron beam. The conductive layer is removed by a remover whose temperature is equal to or higher than 30° C. and equal to or lower than 35° C. The resist film is developed to form a predetermined pattern. Therefore, the conductive layer can be removed without leaving a removal residue, so the pattern after developing is formed at high uniformity within wafer.
    Type: Application
    Filed: September 12, 2007
    Publication date: March 20, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Fumihiro KOBA
  • Patent number: 6887626
    Abstract: The batch projection regions and of an electron beam projection mask are arranged so that pattern density may be equalized on the whole wafer surface.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: May 3, 2005
    Assignee: NEC Electronics Corporation
    Inventor: Fumihiro Koba
  • Patent number: 6468701
    Abstract: A stencil mask includes a mask pattern layer and a supporting layer underlying the mask pattern layer for supporting the mask pattern layer. The supporting layer is a multi-layered structure having layers that decrease in etching rate in a direction toward a top surface of the supporting layer.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: October 22, 2002
    Assignee: NEC Corporation
    Inventor: Fumihiro Koba
  • Patent number: 6447960
    Abstract: First, a mask pattern is defined to a plurality of lattice shaped regions of a uniform dimension. Then, the lattice shaped regions which are adjacent to each other are assigned to different complementary masks. In this manner, the shape of an opening through which electron beams pass is determined so that a displacement caused by a stress acting to each location in the complementary masks is less than a predetermined value.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: September 10, 2002
    Assignee: NEC Corporation
    Inventors: Hiroshi Yamashita, Fumihiro Koba
  • Publication number: 20020098423
    Abstract: The batch projection regions 13 and 14 of the electron beam projection mask are arranged so that pattern density may be equalized on the whole wafer surface.
    Type: Application
    Filed: January 23, 2002
    Publication date: July 25, 2002
    Applicant: NEC Corporation
    Inventor: Fumihiro Koba
  • Publication number: 20020066870
    Abstract: In an electron beam projection lithography mask comprising a first silicon substrate (23) on which a transfer pattern is formed and a second silicon substrate (21) of a pillar side which is stuck on the first silicon substrate (23), slits (25) are formed in the first silicon substrate (23) positioned on pillar areas (21a) of the second silicon substrate (21).
    Type: Application
    Filed: November 30, 2001
    Publication date: June 6, 2002
    Inventor: Fumihiro Koba
  • Patent number: 6351515
    Abstract: A membrane mask for use in an electron beam lighography or X-ray lighography has a membrane film formed on a silicon wafer, and a mask body pattern formed on the membrane film. The membrane film has a heavy-metal-implanted area underlying a portion of the mask body pattern other than the opening of the mask body pattern. The implanted area achieves a higher contrast ratio in the pattern obtained from the membrane mask.
    Type: Grant
    Filed: April 18, 2001
    Date of Patent: February 26, 2002
    Assignee: NEC Corporation
    Inventor: Fumihiro Koba
  • Publication number: 20010046646
    Abstract: A stencil mask has a mask layer having an aperture part with either one or a plurality of apertures, a support part supporting the mask part formed by parts other the aperture parts, and a silicon oxide film layer, disposed between the support part and the mask layer, this silicon oxide film layer including a metal.
    Type: Application
    Filed: May 17, 2001
    Publication date: November 29, 2001
    Applicant: NEC Corporation
    Inventor: Fumihiro Koba
  • Publication number: 20010033634
    Abstract: A membrane mask for use in an electron beam lighography or X-ray lighography has a membrane film formed on a silicon wafer, and a mask body pattern formed on the membrane film. The membrane film has a heavy-metal-implanted area underlying a portion of the mask body pattern other than the opening of the mask body pattern. The implanted area achieves a higher contrast ratio in the pattern obtained from the membrane mask.
    Type: Application
    Filed: April 18, 2001
    Publication date: October 25, 2001
    Inventor: Fumihiro Koba
  • Publication number: 20010028984
    Abstract: First, a mask pattern is defined to a plurality of lattice shaped regions of a uniform dimension. Then, the lattice shaped regions which are adjacent to each other are assigned to different complementary masks. In this manner, the shape of an opening through which electron beams pass is determined so that a displacement caused by a stress acting to each location in the complementary masks is less then a predetermined value.
    Type: Application
    Filed: March 28, 2001
    Publication date: October 11, 2001
    Applicant: NEC Corporation
    Inventors: Hiroshi Yamashita, Fumihiro Koba
  • Patent number: 6291365
    Abstract: In a method for manufacturing a semiconductor device where a silicon substrate is loaded in an oxidation furnace whose temperature is a first value, the temperature of the oxidation furnace is raised to a second value, and an oxidation operation is performed upon the silicon substrate to grow an essential silicon oxide layer on the silicon, a thickness ratio of an initial silicon oxide layer grown before the oxidation operation performing step to a less than 40 Å thick gate silicon oxide layer formed by the initial silicon oxide layer and the essential silicon oxide layer is about 20 to 40 percent.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: September 18, 2001
    Assignee: NEC Corporation
    Inventor: Fumihiro Koba