Patents by Inventor Fumikazu Imai

Fumikazu Imai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12117789
    Abstract: A sensor module includes a first sensor device that outputs first measurement data from a first measurement circuit receiving a signal from a first sensor element and performing a measurement process, a second sensor device that outputs a second measurement circuit receiving a signal from a second sensor element and performing a measurement process, and a microcontroller that receives the first measurement data and the second measurement data, in which the first sensor device includes a first terminal that is used for input of an external synchronization signal or a synchronization signal which is a signal based on the external synchronization signal, and input or output of a communication signal, and the second sensor device includes a second terminal that is used for input of the synchronization signal, and input or output of the communication signal.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: October 15, 2024
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Fumikazu Otani, Yoshikuni Saito, Taketo Chino, Nobuyuki Imai
  • Patent number: 11158503
    Abstract: A silicon carbide semiconductor substrate includes an epitaxial layer. A difference of a donor concentration and an acceptor concentration of the epitaxial layer is within a range from 1×1014/cm3 to 1×1015/cm3. Further, the donor concentration and the acceptor concentration of the epitaxial layer are a concentration unaffected by an impurity inside epitaxial growth equipment.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: October 26, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Fumikazu Imai
  • Publication number: 20200219723
    Abstract: A silicon carbide semiconductor substrate includes an epitaxial layer. A difference of a donor concentration and an acceptor concentration of the epitaxial layer is within a range from 1×1014/cm3 to 1×1015/cm3. Further, the donor concentration and the acceptor concentration of the epitaxial layer are a concentration unaffected by an impurity inside epitaxial growth equipment.
    Type: Application
    Filed: March 18, 2020
    Publication date: July 9, 2020
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Fumikazu IMAI
  • Patent number: 10615031
    Abstract: A silicon carbide semiconductor substrate includes an epitaxial layer. A difference of a donor concentration and an acceptor concentration of the epitaxial layer is within a range from 1×1014/cm3 to 1×1015/cm3. Further, the donor concentration and the acceptor concentration of the epitaxial layer are a concentration unaffected by an impurity inside epitaxial growth equipment.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: April 7, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Fumikazu Imai
  • Patent number: 10600872
    Abstract: A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate of a first conductivity type, a first silicon carbide layer of the first conductivity type, and an insulating film. In the silicon carbide semiconductor device, no fluorine or chlorine is detectable in the insulating film, at a boundary layer of the insulating film and the first silicon carbide layer, or at the surface of first silicon carbide layer where the insulating film is provided.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: March 24, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Makoto Utsumi, Yasuhiko Oonishi, Fumikazu Imai
  • Patent number: 10600921
    Abstract: In forming an ohmic electrode on a back surface of an n-type SiC substrate, an n+-type semiconductor region is formed in a surface layer of the back surface of an n-type epitaxial substrate by ion implantation. In this ion implantation, the impurity concentration of the n+-type semiconductor region is a predetermined range and preferably a predetermined value or less, and an n-type impurity is implanted by acceleration energy of a predetermined range such that the n+-type semiconductor region has a predetermined thickness or less. Thereafter, a nickel layer and a titanium layer are sequentially formed on the surface of the n+-type semiconductor region, the nickel layer is heat treated to form a silicide, and the ohmic electrode formed from nickel silicide is formed. In this manner, a back surface electrode that has favorable properties can be formed while peeling of the back surface electrode can be suppressed.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: March 24, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Naoyuki Ohse, Fumikazu Imai, Tsunehiro Nakajima, Kenji Fukuda, Shinsuke Harada, Mitsuo Okamoto
  • Patent number: 10580870
    Abstract: A method of manufacturing a silicon carbide semiconductor device includes forming a first silicon carbide layer of a first conductivity type on a front surface of a silicon carbide semiconductor substrate. A thermal oxidation film is formed on a surface of a base body including the first silicon carbide layer. The thermal oxidation film is subsequently removed using a solution containing hydrofluoric acid. The base body is washed with a mixture of ammonia water and a hydrogen peroxide solution, a mixture of hydrochloric acid and a hydrogen peroxide solution, and a dilute hydrofluoric acid. The base body is held at temperature of 700 degrees C. to 1700 degrees C., and an insulating film is deposited on the base body.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: March 3, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Makoto Utsumi, Yasuhiko Oonishi, Fumikazu Imai
  • Publication number: 20190245079
    Abstract: A vertical MOSFET having a trench gate structure includes an n?-type drift layer and a p-type base layer formed by epitaxial growth. In the p-type base layer, an n+-type source region is provided. A trench that penetrates the p-type base layer and the n+-type source region, and reaches the n?-type drift layer is provided. The first p+-type region is in contact with a bottom of the trench and is implanted with an impurity that determines a conductivity type of the first p+-type region and a first element that bonds with a second element that is displaced by the impurity, the impurity and the second element being implanted at a predetermined ratio.
    Type: Application
    Filed: December 28, 2018
    Publication date: August 8, 2019
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Fumikazu Imai, Takahito Kojima
  • Patent number: 10374050
    Abstract: A titanium layer and a nickel layer are sequentially formed on a back surface of a SiC wafer. Next, by high-temperature heat treatment, the SiC wafer is heated and the titanium layer and the nickel layer are sintered forming a nickel silicide layer that includes titanium carbide. By this high-temperature heat treatment, an ohmic contact of the SiC wafer and the nickel silicide layer is formed. Thereafter, on the nickel silicide layer, a back surface electrode multilayered structure is formed by sequentially stacking a titanium layer, a nickel layer, and a gold layer. Here, in forming the nickel layer that configures a back surface electrode multilayered structure, the nickel layer is formed under a condition that satisfies 0.0<y<?0.0013x+2.0, where the thickness of the nickel layer is x [nm] and the deposition rate of the nickel layer is y [nm/second]. Thus, peeling of the back surface electrode can be suppressed.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: August 6, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Fumikazu Imai, Tsunehiro Nakajima
  • Publication number: 20190157398
    Abstract: A method of manufacturing a silicon carbide semiconductor device includes forming a first silicon carbide layer of a first conductivity type on a front surface of a silicon carbide semiconductor substrate. A thermal oxidation film is formed on a surface of a base body including the first silicon carbide layer. The thermal oxidation film is subsequently removed using a solution containing hydrofluoric acid. The base body is washed with a mixture of ammonia water and a hydrogen peroxide solution, a mixture of hydrochloric acid and a hydrogen peroxide solution, and a dilute hydrofluoric acid. The base body is held at temperature of 700 degrees C. to 1700 degrees C., and an insulating film is deposited on the base body.
    Type: Application
    Filed: January 4, 2019
    Publication date: May 23, 2019
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Makoto UTSUMI, Yasuhiko OONISHI, Fumikazu IMAI
  • Publication number: 20180301536
    Abstract: A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate of a first conductivity type, a first silicon carbide layer of the first conductivity type, and an insulating film. In the silicon carbide semiconductor device, no fluorine or chlorine is detectable in the insulating film, at a boundary layer of the insulating film and the first silicon carbide layer, or at the surface of first silicon carbide layer where the insulating film is provided.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 18, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Makoto UTSUMI, Yasuhiko OONISHI, Fumikazu IMAI
  • Patent number: 10103220
    Abstract: An impurity of a second conductivity type is selectively doped in a surface of a semiconductor substrate of a first conductivity type to form doped regions. A portion of a surface of the doped regions is covered by a heat insulating film. At least a remaining portion of the surface of the doped regions is covered by an absorbing film and the doped regions are heated through the absorbing film, enabling an impurity region of the second conductivity type to be formed having two or more of the doped regions that have a same impurity concentration and differing carrier concentrations.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: October 16, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Tomonori Katano, Fumikazu Imai
  • Patent number: 10032894
    Abstract: After a titanium nitride film is formed to cover an interlayer insulating film, a first nickel film is formed on a front surface of a silicon carbide base exposed in a contact hole, so as to extend on the titanium nitride film. Next, the silicon carbide base and the first nickel film are reacted by rapid thermal annealing at a temperature of 800 to 1100 degrees C. to form a nickel silicide film that forms an ohmic contact. Grains of the titanium nitride film are enlarged by the rapid thermal annealing, making a grain size of the titanium nitride film 20 nm to 50 nm. Thus, interstices of the grains of the titanium nitride film become smaller than before the rapid thermal annealing or are eliminated, enabling the intrusion of nickel from the first nickel film into the interstices of the columnar grains of the titanium nitride film to be suppressed.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: July 24, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takuya Komatsu, Fumikazu Imai
  • Publication number: 20180175141
    Abstract: An impurity of a second conductivity type is selectively doped in a surface of a semiconductor substrate of a first conductivity type to form doped regions. A portion of a surface of the doped regions is covered by a heat insulating film. At least a remaining portion of the surface of the doped regions is covered by an absorbing film and the doped regions are heated through the absorbing film, enabling an impurity region of the second conductivity type to be formed having two or more of the doped regions that have a same impurity concentration and differing carrier concentrations.
    Type: Application
    Filed: February 15, 2018
    Publication date: June 21, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Tomonori Katano, Fumikazu Imai
  • Patent number: 9929232
    Abstract: An impurity of a second conductivity type is selectively doped in a surface of a semiconductor substrate of a first conductivity type to form doped regions. A portion of a surface of the doped regions is covered by a heat insulating film. At least a remaining portion of the surface of the doped regions is covered by an absorbing film and the doped regions are heated through the absorbing film, enabling an impurity region of the second conductivity type to be formed having two or more of the doped regions that have a same impurity concentration and differing carrier concentrations.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: March 27, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Tomonori Katano, Fumikazu Imai
  • Publication number: 20180040480
    Abstract: A silicon carbide semiconductor substrate includes an epitaxial layer. A difference of a donor concentration and an acceptor concentration of the epitaxial layer is within a range from 1×1014/cm3 to 1×1015/cm3. Further, the donor concentration and the acceptor concentration of the epitaxial layer are a concentration unaffected by an impurity inside epitaxial growth equipment.
    Type: Application
    Filed: August 1, 2017
    Publication date: February 8, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Fumikazu IMAI
  • Patent number: 9887270
    Abstract: A silicon carbide semiconductor device includes an n+-type SiC substrate, a gate oxide film formed on a portion of the surface of the n+-type SiC substrate, a gate electrode formed on the gate oxide film, an interlayer insulating film formed so as to cover the gate electrode, a TiN film formed so as to cover the interlayer insulating film, and a Ni silicide layer formed on a surface of the n+-type SiC substrate not covered by the interlayer insulating film. The TiN film has two or more layers.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: February 6, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Masanobu Iwaya, Fumikazu Imai, Takuya Komatsu
  • Publication number: 20170271468
    Abstract: A silicon carbide semiconductor device includes an n+-type SiC substrate, a gate oxide film formed on a portion of the surface of the n+-type SiC substrate, a gate electrode formed on the gate oxide film, an interlayer insulating film formed so as to cover the gate electrode, a TiN film formed so as to cover the interlayer insulating film, and a Ni silicide layer formed on a surface of the n+-type SiC substrate not covered by the interlayer insulating film. The TiN film has two or more layers.
    Type: Application
    Filed: February 28, 2017
    Publication date: September 21, 2017
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Masanobu IWAYA, Fumikazu IMAI, Takuya KOMATSU
  • Publication number: 20170271486
    Abstract: After a titanium nitride film is formed to cover an interlayer insulating film, a first nickel film is formed on a front surface of a silicon carbide base exposed in a contact hole, so as to extend on the titanium nitride film. Next, the silicon carbide base and the first nickel film are reacted by rapid thermal annealing at a temperature of 800 to 1100 degrees C. to form a nickel silicide film that forms an ohmic contact. Grains of the titanium nitride film are enlarged by the rapid thermal annealing, making a grain size of the titanium nitride film 20 nm to 50 nm. Thus, interstices of the grains of the titanium nitride film become smaller than before the rapid thermal annealing or are eliminated, enabling the intrusion of nickel from the first nickel film into the interstices of the columnar grains of the titanium nitride film to be suppressed.
    Type: Application
    Filed: January 25, 2017
    Publication date: September 21, 2017
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Takuya KOMATSU, Fumikazu IMAI
  • Publication number: 20170271439
    Abstract: An impurity of a second conductivity type is selectively doped in a surface of a semiconductor substrate of a first conductivity type to form doped regions. A portion of a surface of the doped regions is covered by a heat insulating film. At least a remaining portion of the surface of the doped regions is covered by an absorbing film and the doped regions are heated through the absorbing film, enabling an impurity region of the second conductivity type to be formed having two or more of the doped regions that have a same impurity concentration and differing carrier concentrations.
    Type: Application
    Filed: January 25, 2017
    Publication date: September 21, 2017
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Tomonori KATANO, Fumikazu IMAI