Patents by Inventor Fumikazu Yamaki
Fumikazu Yamaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8629454Abstract: A semiconductor device includes: a nitride semiconductor layer; a source electrode, a gate electrode and a drain electrode; an insulating layer covering at least the gate electrode and a part of the nitride semiconductor layer; and a field plate on the insulating layer, a width of a region of the field plate between an edge of the field plate of a side of the drain electrode and an edge of the side face of the insulating layer covering a side face of the gate electrode of a side of the drain electrode being 0.1 ?m or more, a distance between an edge of the field plate and an edge of the drain electrode in a contact face between the nitride semiconductor layer and the drain electrode being 3.5 ?m or more, an operating frequency of the semiconductor device being 4 GHz or less.Type: GrantFiled: June 4, 2012Date of Patent: January 14, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventor: Fumikazu Yamaki
-
Patent number: 8604474Abstract: One type of a semiconductor device integrating with a monitoring device is disclosed. The device includes a plurality of gate fingers, two of which arranged in a center of the device has a space wider than a space between any other fingers to suppress the heat concentration on the center of the device. The monitoring region is arranged in this wider space to monitor the temperature dependence of the device.Type: GrantFiled: July 14, 2011Date of Patent: December 10, 2013Assignee: Sumitomo Electric Industries Ltd.Inventor: Fumikazu Yamaki
-
Patent number: 8592825Abstract: A semiconductor device and a process to form the semiconductor device are disclosed. The semiconductor device includes a Si substrate, active devices primarily made of nitride based compound semiconductor material, and passive devices. The Si substrate includes a via hole piercing from the back surface to the primary surface of the Si substrate. The active device is mounted on the primary surface so as to cover at least a portion of the via hole. The metal layer cover the whole back surface, inner surfaces of the via hole, and the back surface of the active device exposed in the via hole.Type: GrantFiled: July 25, 2011Date of Patent: November 26, 2013Assignee: Sumitomo Electric Industries Ltd.Inventor: Fumikazu Yamaki
-
Publication number: 20120305936Abstract: A semiconductor device includes: a nitride semiconductor layer; a source electrode, a gate electrode and a drain electrode; an insulating layer covering at least the gate electrode and a part of the nitride semiconductor layer; and a field plate on the insulating layer, a width of a region of the field plate between an edge of the field plate of a side of the drain electrode and an edge of the side face of the insulating layer covering a side face of the gate electrode of a side of the drain electrode being 0.1 ?m or more, a distance between an edge of the field plate and an edge of the drain electrode in a contact face between the nitride semiconductor layer and the drain electrode being 3.5 ?m or more, an operating frequency of the semiconductor device being 4 GHz or less.Type: ApplicationFiled: June 4, 2012Publication date: December 6, 2012Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Fumikazu YAMAKI
-
Patent number: 8242512Abstract: A compound semiconductor device includes: an electron transit layer made of GaN; a channel layer made of AlGaN; a source electrode, a gate electrode and a drain electrode that are provided on the channel layer; a cap layer that is provided at least between the source electrode and the gate electrode and between the gate electrode and the drain electrode and is made of GaN; a recess portion that is provided in the cap layer between the gate electrode and the drain electrode; and a thick portion that is provided in the cap layer between the recess portion and the drain electrode and has a thickness larger than the recess portion.Type: GrantFiled: January 10, 2011Date of Patent: August 14, 2012Assignee: Sumitomo Electric Industries, Ltd.Inventors: Fumikazu Yamaki, Kazutaka Inoue
-
Publication number: 20120025188Abstract: One type of a semiconductor device integrating with a monitoring device is disclosed. The device includes a plurality of gate fingers, two of which arranged in a center of the device has a space wider than a space between any other fingers to suppress the heat concentration on the center of the device. The monitoring region is arranged in this wider space to monitor the temperature dependence of the device.Type: ApplicationFiled: July 14, 2011Publication date: February 2, 2012Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Fumikazu YAMAKI
-
Publication number: 20120025204Abstract: A semiconductor device and a process to form the semiconductor device are disclosed. The semiconductor device includes a Si substrate, active devices primarily made of nitride based compound semiconductor material, and passive devices. The Si substrate includes a via hole piercing from the back surface to the primary surface of the Si substrate. The active device is mounted on the primary surface so as to cover at least a portion of the via hole. The metal layer cover the whole back surface, inner surfaces of the via hole, and the back surface of the active device exposed in the via hole.Type: ApplicationFiled: July 25, 2011Publication date: February 2, 2012Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Fumikazu YAMAKI
-
Publication number: 20110169014Abstract: A compound semiconductor device includes: an electron transit layer made of GaN; a channel layer made of AlGaN; a source electrode, a gate electrode and a drain electrode that are provided on the channel layer; a cap layer that is provided at least between the source electrode and the gate electrode and between the gate electrode and the drain electrode and is made of GaN; a recess portion that is provided in the cap layer between the gate electrode and the drain electrode; and a thick portion that is provided in the cap layer between the recess portion and the drain electrode and has a thickness larger than the recess portion.Type: ApplicationFiled: January 10, 2011Publication date: July 14, 2011Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Fumikazu Yamaki, Kazutaka Inoue
-
Patent number: 6982441Abstract: A semiconductor device includes a compound semiconductor substrate having a resistivity less than 1.0×108 Ohm-cm at least at one surface thereof, a buffer layer formed on the compound semiconductor substrate and having a super lattice structure, and an active layer formed on the buffer layer and having an active element formed therein.Type: GrantFiled: January 4, 2002Date of Patent: January 3, 2006Assignee: Fujitsu Quantum Devices LimitedInventors: Fumikazu Yamaki, Takeshi Igarashi
-
Publication number: 20020088994Abstract: A semiconductor device includes a compound semiconductor substrate having a resistivity less than 1.0×108 Ohm-cm at least at one surface thereof, a buffer layer formed on the compound semiconductor substrate and having a super lattice structure, and an active layer formed on the buffer layer and having an active element formed therein.Type: ApplicationFiled: January 4, 2002Publication date: July 11, 2002Applicant: Fujitsu Quantum Devices LimitedInventors: Fumikazu Yamaki, Takeshi Igarashi