Patents by Inventor Fumimasa AZUMA

Fumimasa AZUMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11073856
    Abstract: An input circuit includes a first input transistor and a second input transistor connected to an input terminal; a current source which makes a current flow in the second input transistor through a current mirror; a switch provided between the current mirror and the current source, and having a switch control terminal connected to the drain of the first input transistor; and a transistor connected to the first input transistor, on/off of the transistor being controlled by an output signal, wherein a current drivability of the second input transistor is switched by an output signal, and a threshold voltage to the input signal is determined based on the current drivability of the second input transistor and the current source.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: July 27, 2021
    Assignee: ABLIC INC.
    Inventors: Yoshiomi Shiina, Fumimasa Azuma
  • Publication number: 20200249710
    Abstract: An input circuit includes a first input transistor and a second input transistor connected to an input terminal; a current source which makes a current flow in the second input transistor through a current mirror; a switch provided between the current mirror and the current source, and having a switch control terminal connected to the drain of the first input transistor; and a transistor connected to the first input transistor, on/off of the transistor being controlled by an output signal, wherein a current drivability of the second input transistor is switched by an output signal, and a threshold voltage to the input signal is determined based on the current drivability of the second input transistor and the current source.
    Type: Application
    Filed: January 23, 2020
    Publication date: August 6, 2020
    Inventors: Yoshiomi SHIINA, Fumimasa Azuma
  • Patent number: 9819173
    Abstract: To provide an overheat protection circuit which is not affected by a leak current while being low in current consumption and good in detection accuracy, and a voltage regulator equipped with the overheat protection circuit. An overheat protection circuit is configured to include a leak current detection circuit which detects that a leak current has flowed at a high temperature, a bias circuit which allows a bias current to flow in response to an output signal of the leak current detection circuit, and a temperature detection circuit operated by the bias current.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: November 14, 2017
    Assignee: Seiko Instruments Inc.
    Inventors: Daiki Endo, Fumimasa Azuma
  • Patent number: 9348350
    Abstract: Provided is a voltage regulator including an overcurrent protection circuit in which an output voltage-output current characteristic exhibits an optimal fold-back characteristic even when an overcurrent state is detected. The overcurrent protection circuit includes a control circuit for generating a current in accordance with an output voltage, and controls a gate of an output transistor with use of a current obtained by subtracting the current from a sense current flowing in accordance with an output current.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: May 24, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Fumimasa Azuma
  • Patent number: 9236732
    Abstract: Provided is a voltage regulator capable of suppressing an overshoot with low current consumption. A comparator of an overshoot detection circuit is activated only when a power supply fluctuation occurs, and the comparator outputs a signal for reducing an overshoot occurring in an output voltage. In a steady state, the comparator of the overshoot detection circuit is turned off to prevent the current from being consumed.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: January 12, 2016
    Assignee: SEIKO INSTRUMENTS INC.
    Inventors: Takashi Matsuda, Fumimasa Azuma
  • Publication number: 20150263507
    Abstract: To provide an overheat protection circuit which is not affected by a leak current while being low in current consumption and good in detection accuracy, and a voltage regulator equipped with the overheat protection circuit. An overheat protection circuit is configured to include a leak current detection circuit which detects that a leak current has flowed at a high temperature, a bias circuit which allows a bias current to flow in response to an output signal of the leak current detection circuit, and a temperature detection circuit operated by the bias current.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 17, 2015
    Inventors: Daiki ENDO, Fumimasa AZUMA
  • Publication number: 20150055257
    Abstract: Provided is a voltage regulator including an overcurrent protection circuit in which an output voltage-output current characteristic exhibits an optimal fold-back characteristic even when an overcurrent state is detected. The overcurrent protection circuit includes a control circuit for generating a current in accordance with an output voltage, and controls a gate of an output transistor with use of a current obtained by subtracting the current from a sense current flowing in accordance with an output current.
    Type: Application
    Filed: August 21, 2014
    Publication date: February 26, 2015
    Inventor: Fumimasa AZUMA
  • Publication number: 20140091776
    Abstract: Provided is a voltage regulator capable of suppressing an overshoot with low current consumption. A comparator of an overshoot detection circuit is activated only when a power supply fluctuation occurs, and the comparator outputs a signal for reducing an overshoot occurring in an output voltage. In a steady state, the comparator of the overshoot detection circuit is turned off to prevent the current from being consumed.
    Type: Application
    Filed: September 20, 2013
    Publication date: April 3, 2014
    Applicant: Seiko Instruments Inc.
    Inventors: Takashi MATSUDA, Fumimasa AZUMA