Patents by Inventor Fuminori Tamura

Fuminori Tamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129449
    Abstract: A display control device includes a first acquisition unit that acquires first viewpoint position information, and a first control unit that performs a control of displaying a first viewpoint video selected from among a plurality of viewpoint videos generated based on images obtained by imaging an imaging region from a plurality of viewpoint positions on a first display unit, in which the first control unit performs a control of displaying first specific information for specifying a first viewpoint position in the first viewpoint video in a case in which the first viewpoint position indicated by the acquired first viewpoint position information is included in the first viewpoint video and performs a control of changing a display size of the first specific information depending on an angle of view of the first viewpoint video displayed on the first display unit.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Inventors: Fuminori IRIE, Takashi AOKI, Kazunori TAMURA, Masahiko MIYATA
  • Publication number: 20240094586
    Abstract: An active matrix substrate includes a plurality of pixel electrodes; a plurality of switching elements that connect to each of the plurality of pixel electrodes; a plurality of pixel lines that connect to each of the plurality of switching elements; a plurality of connection lines that connect to each of the plurality of pixel lines; and a plurality of terminals that connect to each of the plurality of connection lines. An arrangement direction of the pixel lines and an arrangement direction of the terminals differ.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 21, 2024
    Applicant: TIANMA JAPAN, LTD.
    Inventors: Hiroki SUGAYA, Fuminori TAMURA, Takayuki ISHINO
  • Patent number: 10914846
    Abstract: An image sensor includes: a switching element disposed on a substrate; a photoelectric conversion element connected to the switching element; a first protective film directly covering the photoelectric conversion element; and a first organic film formed at a layer above the switching element, the first organic film being in contact with the first protective film, wherein the first organic film covers a first end portion of the photoelectric conversion element, the first end portion being at least a part of an end portion of the photoelectric conversion element, wherein the first organic film has a first covering portion at an end of the first organic film, wherein the first covering portion covers the first end portion, wherein the first covering portion is inclined down towards the photoelectric conversion element, and wherein the first organic film covers only the first end portion of the photoelectric conversion element.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: February 9, 2021
    Assignee: TIANMA JAPAN, LTD.
    Inventors: Shuhei Nara, Hiroyuki Sekine, Takayuki Ishino, Fuminori Tamura, Yoshikazu Hatazawa
  • Patent number: 10615201
    Abstract: In manufacturing an image sensor for FPD having an oxide semiconductor TFT as a switching element, a large amount of hydrogen contained in raw gas is diffused in the oxide semiconductor at the time of forming a-Si photo diode (PD) which is a photoelectric conversion element, causing significant variation in the characteristic of TFT which may thereby not operate. In an image sensor in which an oxide semiconductor TFT and a-Si PD are formed on a substrate in this order, a gas barrier film is disposed between the oxide semiconductor TFT and the PD, and the drain terminal (drain metal) of the oxide semiconductor TFT is connected to one terminal (lower electrode) of the PD via connection wiring (bridge wiring) formed on a protective film arranged over the PD.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: April 7, 2020
    Assignee: TIANMA MICROELECTRONICS CO., LTD.
    Inventors: Hiroyuki Sekine, Takayuki Ishino, Yusuke Yamamoto, Yoshikazu Hatazawa, Fuminori Tamura
  • Publication number: 20200003911
    Abstract: An image sensor includes: a switching element disposed on a substrate; a photoelectric conversion element connected to the switching element; a first protective film directly covering the photoelectric conversion element; and a first organic film formed at a layer above the switching element, the first organic film being in contact with the first protective film, wherein the first organic film covers a first end portion of the photoelectric conversion element, the first end portion being at least a part of an end portion of the photoelectric conversion element, wherein the first organic film has a first covering portion at an end of the first organic film, wherein the first covering portion covers the first end portion, wherein the first covering portion is inclined down towards the photoelectric conversion element, and wherein the first organic film covers only the first end portion of the photoelectric conversion element.
    Type: Application
    Filed: July 2, 2019
    Publication date: January 2, 2020
    Inventors: Shuhei NARA, Hiroyuki SEKINE, Takayuki ISHINO, Fuminori TAMURA, Yoshikazu HATAZAWA
  • Patent number: 9806123
    Abstract: Provided are an image sensor and a method of manufacturing method of manufacturing the image sensor. The image sensor includes a substrate, photoelectric transducers and switching elements formed in layers on the substrate in this order. Each of the photoelectric transducers includes a hydrogenated amorphous silicon layer. Each of the switching elements includes an amorphous oxide semiconductor layer. The image sensor further includes a blocking layer arranged between the hydrogenated amorphous silicon layers of the photoelectric transducers and the amorphous oxide semiconductor layers of the switching elements, where the blocking layer suppresses penetration of hydrogen separated from the hydrogenated amorphous silicon layers.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: October 31, 2017
    Assignee: NLT TECHNOLOGIES, LTD.
    Inventors: Hiroyuki Sekine, Takayuki Ishino, Toru Ukita, Fuminori Tamura, Kazushige Takechi
  • Publication number: 20170250214
    Abstract: In manufacturing an image sensor for FPD having an oxide semiconductor TFT as a switching element, a large amount of hydrogen contained in raw gas is diffused in the oxide semiconductor at the time of forming a-Si photo diode (PD) which is a photoelectric conversion element, causing significant variation in the characteristic of TFT which may thereby not operate. In an image sensor in which an oxide semiconductor TFT and a-Si PD are formed on a substrate in this order, a gas barrier film is disposed between the oxide semiconductor TFT and the PD, and the drain terminal (drain metal) of the oxide semiconductor TFT is connected to one terminal (lower electrode) of the PD via connection wiring (bridge wiring) formed on a protective film arranged over the PD.
    Type: Application
    Filed: February 1, 2017
    Publication date: August 31, 2017
    Inventors: Hiroyuki SEKINE, Takayuki ISHINO, Yusuke YAMAMOTO, Yoshikazu HATAZAWA, Fuminori TAMURA
  • Publication number: 20160293659
    Abstract: Provided are an image sensor and a method of manufacturing method of manufacturing the image sensor. The image sensor includes a substrate, photoelectric transducers and switching elements formed in layers on the substrate in this order. Each of the photoelectric transducers includes a hydrogenated amorphous silicon layer. Each of the switching elements includes an amorphous oxide semiconductor layer. The image sensor further includes a blocking layer arranged between the hydrogenated amorphous silicon layers of the photoelectric transducers and the amorphous oxide semiconductor layers of the switching elements, where the blocking layer suppresses penetration of hydrogen separated from the hydrogenated amorphous silicon layers.
    Type: Application
    Filed: June 22, 2016
    Publication date: October 6, 2016
    Applicant: NLT Technologies, Ltd.
    Inventors: Hiroyuki SEKINE, Takayuki ISHINO, Toru UKITA, Fuminori TAMURA, Kazushige TAKECHI
  • Patent number: 9401382
    Abstract: Provided are an image sensor and a method of manufacturing method of manufacturing the image sensor. The image sensor includes a substrate, photoelectric transducers and switching elements formed in layers on the substrate in this order. Each of the photoelectric transducers includes a hydrogenated amorphous silicon layer. Each of the switching elements includes an amorphous oxide semiconductor layer. The image sensor further includes a blocking layer arranged between the hydrogenated amorphous silicon layers of the photoelectric transducers and the amorphous oxide semiconductor layers of the switching elements, where the blocking layer suppresses penetration of hydrogen separated from the hydrogenated amorphous silicon layers.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: July 26, 2016
    Assignee: NLT TECHNOLOGIES, LTD.
    Inventors: Hiroyuki Sekine, Takayuki Ishino, Toru Ukita, Fuminori Tamura, Kazushige Takechi
  • Publication number: 20150123119
    Abstract: Provided are an image sensor and a method of manufacturing method of manufacturing the image sensor. The image sensor includes a substrate, photoelectric transducers and switching elements formed in layers on the substrate in this order. Each of the photoelectric transducers includes a hydrogenated amorphous silicon layer. Each of the switching elements includes an amorphous oxide semiconductor layer. The image sensor further includes a blocking layer arranged between the hydrogenated amorphous silicon layers of the photoelectric transducers and the amorphous oxide semiconductor layers of the switching elements, where the blocking layer suppresses penetration of hydrogen separated from the hydrogenated amorphous silicon layers.
    Type: Application
    Filed: October 31, 2014
    Publication date: May 7, 2015
    Applicant: NLT TECHNOLOGIES, LTD.
    Inventors: Hiroyuki SEKINE, Takayuki ISHINO, Toru UKITA, Fuminori TAMURA, Kazushige TAKECHI
  • Patent number: 6839113
    Abstract: An IPS (In-Plane Switching) liquid crystal display is disclosed that maintains excellent display uniformity and high aperture ratio as well as high yield during fabrication, and that includes a first transparent substrate, a second transparent substrate arranged to confront the first transparent substrate and provided with a second alignment layer, and a liquid crystal component sealed between the first transparent substrate and second transparent substrate. The first transparent substrate is provided with: a transparent insulating substrate, pixel electrodes and common electrodes that are arranged alternately and substantially parallel to each other on the transparent insulating substrate, a plurality of pixels arranged in matrix form, scan lines and switching elements for controlling the electric field applied to the pixel electrodes, signal lines, and a first alignment layer.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: January 4, 2005
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Makoto Watanabe, Takahiko Watanabe, Fuminori Tamura
  • Patent number: 6656502
    Abstract: A sustained release preparation of prostaglandin I derivatives, which is highly safe and has stable drug-releasing and absorption properties, is disclosed. In the orally administrable preparation, the active component is a prostaglandin I derivative and the release-controlling component is a hydrogel base.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: December 2, 2003
    Assignee: Toray Industries, Inc.
    Inventors: Michio Hara, Yasuhide Horiuchi, Fuminori Tamura, Keishi Yamasaki
  • Patent number: 6608653
    Abstract: A thin film transistor is designed in such a manner that a semiconductor region includes source and drain electrodes in a channel width direction and further, a planar source-side overlap area constructed by a gate electrode, the source electrode and the semiconductor region and a planar drain-side overlap area constructed by the gate electrode, the drain electrode and the semiconductor region exist. An optimal overlap length of one of the source-side and drain-side overlap areas in a channel length direction is determined, for instance, to be 4 &mgr;m, for a light incident on a channel portion of the thin film transistor to have a light intensity below or equal to 0.2% of a light intensity of the backlight incident toward the thin film transistor, thereby reducing a light-induced OFF leak current sufficiently and further improving flickering and display uniformity.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: August 19, 2003
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Shunsuke Shiga, Fuminori Tamura, Shouichi Kuroha, Makoto Watanabe
  • Publication number: 20030112393
    Abstract: An IPS (In-Plane Switching) liquid crystal display is disclosed that maintains excellent display uniformity and high aperture ratio as well as high yield during fabrication, and that includes a first transparent substrate, a second transparent substrate arranged to confront the first transparent substrate and provided with a second alignment layer, and a liquid crystal component sealed between the first transparent substrate and second transparent substrate. The first transparent substrate is provided with: a transparent insulating substrate, pixel electrodes and common electrodes that are arranged alternately and substantially parallel to each other on the transparent insulating substrate, a plurality of pixels arranged in matrix form, scan lines and switching elements for controlling the electric field applied to the pixel electrodes, signal lines, and a first alignment layer.
    Type: Application
    Filed: July 30, 1999
    Publication date: June 19, 2003
    Inventors: MAKOTO WATANABE, TAKAHIKO WATANABE, FUMINORI TAMURA
  • Patent number: 6529258
    Abstract: Liquid crystal display device includes a lower-level layer such a scan line running in a first direction and an upper-level layer such a signal (data) line running in a second direction intersecting the first direction, these two layers crossing each other. An island region such a semiconductor layer is provided at the crossing portion of the lower-level and upper-level layers to intervene between the lower-level and upper-level layers. The island region has a first edge that extends in the first direction and a second edge that extends in the first direction and is different in coordinate in the second direction from the first edge. The upper-level layer being formed such that a pair of side edges defining the width of the upper-level layer cross respectively with the first and second edges of the island region. The island region may further have a third edge that extends in the second direction to connect the first and second edges.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: March 4, 2003
    Assignee: NEC Corporation
    Inventors: Makoto Watanabe, Fuminori Tamura
  • Patent number: 6483565
    Abstract: An in-plane switching mode LCD panel has a plurality of scanning lines each supplied with a scanning signal at both ends of the each of scanning lines. A common terminal connected to the common electrode for the pixels and a block of scanning terminals to form a terminal block for achieving a uniform driving voltage among the pixels, thereby preventing cross-talk between the pixels and a achieving a uniform driving voltage among the pixels.
    Type: Grant
    Filed: October 23, 2000
    Date of Patent: November 19, 2002
    Assignee: NEC Corporation
    Inventors: Masanobu Hidehira, Syouichi Kuroha, Seiichi Matsumoto, Fuminori Tamura
  • Publication number: 20020113914
    Abstract: A thin film transistor is designed in such a manner that a semiconductor region includes source and drain electrodes in a channel width direction and further, a planar source-side overlap area constructed by a gate electrode, the source electrode and the semiconductor region and a planar drain-side overlap area constructed by the gate electrode, the drain electrode and the semiconductor region exist. An optimal overlap length of one of the source-side and drain-side overlap areas in a channel length direction is determined, for instance, to be 4 &mgr;m, for a light incident on a channel portion of the thin film transistor to have a light intensity below or equal to 0.2% of a light intensity of the backlight incident toward the thin film transistor, thereby reducing a light-induced OFF leak current sufficiently and further improving flickering and display uniformity.
    Type: Application
    Filed: November 28, 2001
    Publication date: August 22, 2002
    Applicant: NEC Corporation
    Inventors: Shunsuke Shiga, Fuminori Tamura, Shouichi Kuroha, Makoto Watanabe
  • Publication number: 20020099043
    Abstract: A freeze-dried product containing a platinum (II) complex represented by the following general formula as a primary component.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 25, 2002
    Applicant: Toray Industries, Inc.
    Inventors: Masahiro Akimoto, Fuminori Tamura, Yumi Ozawa
  • Publication number: 20020044120
    Abstract: Liquid crystal display device includes a lower-level layer such a scan line running in a first direction and an upper-level layer such a signal (data) line running in a second direction intersecting the first direction, these two layers crossing each other. An island region such a semiconductor layer is provided at the crossing portion of the lower-level and upper-level layers to intervene between the lower-level and upper-level layers. The island region has a first edge that extends in the first direction and a second edge that extends in the first direction and is different in coordinate in the second direction from the first edge. The upper-level layer being formed such that a pair of side edges defining the width of the upper-level layer cross respectively with the first and second edges of the island region. The island region may further have a third edge that extends in the second direction to connect the first and second edges.
    Type: Application
    Filed: October 4, 2001
    Publication date: April 18, 2002
    Applicant: NEC Corporation
    Inventors: Makoto Watanabe, Fuminori Tamura