Abstract: A package transport device includes: a main body (a vehicle main body, a first vehicle main body, and a second vehicle main body); a rail holder (connector) held by a rail located above the main body; a turntable that is provided between the main body and the rail holder and rotates the main body; a slider portion that extends with respect to the main body; and a package holder that holds a package attached to the slider portion.

Abstract: A control system includes: a communication unit that sends, to each of a plurality of devices, a control command for controlling the device; a registration unit that registers a standard action for collectively controlling at least two devices included in the plurality of devices, based on device control consecutiveness which is determined by control history information of the plurality of devices; and an executor that causes the communication unit to send a control command to each of the at least two devices when execution of the standard action registered is instructed.

Abstract: A control system includes: a communication unit that sends, to each of a plurality of devices, a control command for controlling the device; a registration unit that registers a standard action for collectively controlling at least two devices included in the plurality of devices, based on device control consecutiveness which is determined by control history information of the plurality of devices; and an executor that causes the communication unit to send a control command to each of the at least two devices when execution of the standard action registered is instructed.

Abstract: The optical disk controller of this invention that reduces the frequency of output of status reports to relieve the burden of a system controller includes: a status generator for generating status reports each representing the operation state of the optical disk controller every sector of a disk; and a status sampling section for sampling the status reports at a set sampling interval. When a generated status report matches with “sampling abort” status stored in a sampling category storing portion, status sampling is aborted.

Abstract: In modifying a program fixedly recorded in a ROM or the like, desired positions in the program can be modified with a little hardware. In order to achieve the object, the program modification device comprises the modifying address register 17 which stores the addresses of program data to be modified prior to the execution of the data and the modifying address storage table 19 which stores all the addresses of the modification source programs to be loaded to the modifying address register 17 and all the addresses of the modification target programs in pairs, and further comprises a modification target program having instructions embedded therein so as to load necessary information from the modifying address storage table 19 to the modifying address register 17 before the program to be modified is executed.

Abstract: A debugging support apparatus for a processor that executes a plurality of instructions in parallel displays lines of source code statements in a user program that are executed in parallel. Code execution unit 15 executes the program. When execution of the program is interrupted at a breakpoint set in advance at a line of a source code statement, user interface unit 11 searches parallel execution information storage unit 5 for lines to be executed in parallel with the line set the breakpoint, and displays a source code statement of the line set the breakpoint and source code statements of the lines to be executed in parallel. As a result, a user is able to visually recognize which lines of source code statements are executed in parallel.

Abstract: In modifying a program fixedly recorded in a ROM or the like, desired positions in the program can be modified with a little hardware. In order to achieve the object, the program modification device comprises the modifying address register 17 which stores the addresses of program data to be modified prior to the execution of the data and the modifying address storage table 19 which stores all the addresses of the modification source programs to be loaded to the modifying address register 17 and all the addresses of the modification target programs in pairs, and further comprises a modification target program having instructions embedded therein so as to load necessary information from the modifying address storage table 19 to the modifying address register 17 before the program to be modified is executed.

Abstract: A debugging apparatus is disclosed which verifies a program to be embedded into a target machine by running the program in an environment which is one or the target machine, an emulator, and a simulator. Each environment includes operation state information of the program and inputs and outputs the operation state information in a form unique to the environment.

Abstract: A program development system in which the debugging apparatus is informed of all of the optimization processes which have been performed. A primitive storage unit stores record information for the optimization processes. The input unit receives an input of a variable and a value, or an input of a line where execution is to be halted. The primitive combining unit obtains record information showing the optimization processes. The code execution unit executes the execution code. The variable operation unit obtains the value of a variable based on relations between variables and resources. The output unit displays the obtained value of the variable. The line display unit displays the program or the generated execution code. The line information display unit displays, in line units, information relating to the optimization performed for each line, The operation-possible variable display unit displays, for each line, variables which can be set and referred to in the line.