Abstract: A foot exercise device is described. In some embodiments, a foot exercise device includes a base structure and a forefoot structure coupled to the base structure. The base structure is configured to remain stationary. The forefoot structure is configured to be moved by a forefoot of a user while the base structure remains stationary. In some embodiments, a foot exercise device includes a base structure and a heel structure coupled to the base structure. The base structure is configured to remain stationary. The heel structure is configured to be moved by a heel of the user while the base structure remains stationary.

Abstract: A method is disclosed for manufacturing a semiconductor device including a mounting substrate, a semiconductor chip, a rear-surface metal layer, an AuSn solder layer, and a solder blocking metal layer, is disclosed. The semiconductor chip is mounted on the mounting substrate, and includes front and rear surfaces, and a heat generating element. The rear-surface metal layer includes gold (Au). The AuSn solder layer is located between the mounting substrate and the rear surface to fix the semiconductor chip to the mounting substrate. The solder blocking metal layer is located between the rear surface and the mounting substrate, and in a non-heating region excluding a heating region in which the heat generating element is formed. The solder blocking metal layer includes at least one of NiCr, Ni and Ti and extends to an edge of the semiconductor chip. A void is provided between the solder blocking metal layer and the AuSn solder layer.

Abstract: A semiconductor device including a mounting substrate, a semiconductor chip, a rear-surface metal layer, an AuSn solder layer, and a solder blocking metal layer, is disclosed. The semiconductor chip is mounted on the mounting substrate, and includes front and rear surfaces, and a heat generating element. The rear-surface metal layer includes gold (Au). The AuSn solder layer is located between the mounting substrate and the rear surface to fix the semiconductor chip to the mounting substrate. The solder blocking metal layer is located between the rear surface and the mounting substrate, and in a non-heating region excluding a heating region in which the heat generating element is formed. The solder blocking metal layer includes at least one of NiCr, Ni and Ti and extends to an edge of the semiconductor chip. A void is provided between the solder blocking metal layer and the AuSn solder layer.

Abstract: A foot exercise device is described. In some embodiments, a foot exercise device includes a base structure and a forefoot structure coupled to the base structure. The base structure is configured to remain stationary. The forefoot structure is configured to be moved by a forefoot of a user while the base structure remains stationary. In some embodiments, a foot exercise device includes a base structure and a heel structure coupled to the base structure. The base structure is configured to remain stationary. The heel structure is configured to be moved by a heel of the user while the base structure remains stationary.

Abstract: A semiconductor device implementing a field plate is disclosed. The semiconductor device includes electrodes of a source, a gate, and a drain; an insulating film covering at least the drain electrode; a field plate that includes a first part overlapping with the gate electrode and a second part not overlapping with the gate electrode; and a source interconnect connected with the source electrode. A feature of the semiconductor device of the invention is that both of the first part and the second part are electrically connected with the source interconnection.

Abstract: A semiconductor device comprising a mounting substrate, a semiconductor chip, a rear-surface metal layer, an AuSn solder layer, and a solder blocking metal layer, is disclosed. The semiconductor chip is mounted on the mounting substrate, and includes front and rear surfaces, and a heat generating element. The rear-surface metal layer includes gold (Au). The AuSn solder layer is located between the mounting substrate and the rear surface to fix the semiconductor chip to the mounting substrate. The solder blocking metal layer is located between the rear surface and the mounting substrate, and in a non-heating region excluding a heating region in which the heat generating element is formed. The solder blocking metal layer includes at least one of NiCr, Ni and Ti and extends to an edge of the semiconductor chip. A void is provided between the solder blocking metal layer and the AuSn solder layer.

Abstract: A semiconductor device that provides a pad electrically connected to the metal layer and a capacitor connected to the pad is disclosed. The semiconductor device provides an insulating film between the lower electrode of the capacitor and the pad. Because the insulating film protects and isolates the lower electrode from etching of the substrate via and deposition of the via metal, the lower electrode avoids voids or vacancies during formation of the via and the via metal.

Abstract: A semiconductor device implementing a field plate is disclosed. The semiconductor device includes electrodes of a source, a gate, and a drain; an insulating film covering at least the drain electrode; a field plate that includes a first part overlapping with the gate electrode and a second part not overlapping with the gate electrode; and a source interconnect connected with the source electrode. A feature of the semiconductor device of the invention is that both of the first part and the second part are electrically connected with the source interconnection.

Abstract: A semiconductor device that provides a pad electrically connected to the metal layer and a capacitor connected to the pad is disclosed. The semiconductor device provides an insulating film between the lower electrode of the capacitor and the pad. Because the insulating film protects and isolates the lower electrode from the etching of the substrate via and the deposition of the via metal, the lower electrode causes no voids or vacancies during the formation of the via and the via metal.

Abstract: A semiconductor device having a structure to suppress invasion of moisture into a device area is disclosed. The semiconductor device provides the device area including structure for active operations and a peripheral area surrounding the device area and having no functions for the active operations. The semiconductor device further provides a guard metal that is in direct contact to the peripheral area and arranged between a drain pad and a source electrode of the semiconductor device. The guard metal may suppress moisture invading from an opening in the drain pad into the device area.