Abstract: An impedance matching circuit is connected to a first circuit block (impedance matching target circuit) that requires impedance matching and that has one terminal connected to a signal line and the other terminal connected to a ground, the impedance matching circuit having a second circuit block that has a first circuit and a second circuit connected in parallel. In the first circuit, a first capacitor having a variable capacitance and a first inductor having a first inductance are connected in series, and in the second circuit, a second inductor having a second inductance and a switch are connected are connected in series. The impedance matching circuit has one terminal connected to the signal line of the first circuit block and the other terminal connected to the ground of the first circuit block.

Abstract: An impedance matching circuit is connected to a first circuit block (impedance matching target circuit) that requires impedance matching and that has one terminal connected to a signal line and the other terminal connected to a ground, the impedance matching circuit having a second circuit block that has a first circuit and a second circuit connected in parallel. In the first circuit, a first capacitor having a variable capacitance and a first inductor having a first inductance are connected in series, and in the second circuit, a second inductor having a second inductance and a switch are connected are connected in series. The impedance matching circuit has one terminal connected to the signal line of the first circuit block and the other terminal connected to the ground of the first circuit block.

Abstract: A variable frequency amplifier suffering less deterioration of strain characteristic and capable of operating at plural frequencies is disclosed. In one aspect, a changeable amplifier comprises an amplifying element, a changeable matching circuit disposed at an input side of the amplifying element and including a first variable capacity element connected in series with a signal conductor and a second variable capacity element connected in parallel with the signal conductor, and a control circuit for controlling the changeable matching circuit. Based on a feedback signal, the control circuit applies DC bias voltages to the first variable capacity element and the second variable capacity element of the changeable matching circuit and also applies thereto a correction signal.

Abstract: An adaptive array antenna is disclosed which permits the circuit scale to be reduced by omitting a down-converter, an AD converter, and interconnects for them while controlling the directivity well. In one aspect, the array antenna comprises phase shift-amplitude control modules which accept signals received by antenna elements via an analog-to-digital converter. The value of any one of phase-amplitude change modules is set to 1. The values of the other phase-amplitude change modules are set to 0. Thus, the signal from any one antenna element is accepted. This sequence of operations is repeated as many times as there are antenna elements, whereby signals received by all the antenna elements can be accepted.

Abstract: An adaptive array antenna is disclosed which permits the circuit scale to be reduced by omitting a down-converter, an AD converter, and interconnects for them while controlling the directivity well. In one aspect, the array antenna comprises phase shift-amplitude control modules which accept signals received by antenna elements via an analog-to-digital converter. The value of any one of phase-amplitude change modules is set to 1. The values of the other phase-amplitude change modules are set to 0. Thus, the signal from any one antenna element is accepted. This sequence of operations is repeated as many times as there are antenna elements, whereby signals received by all the antenna elements can be accepted.

Abstract: A calibration apparatus for a quadrature modulation system with a quadrature modulation compensator and a logarithmic envelop detector, wherein a parameter update of the quadrature modulation compensator is derived by utilizing a transformed offset value and a transformed gain value of the logarithmic envelop detector as intermediate parameters, and the transformed offset and the transformed gain parameters are used in a training sequence of the quadrature modulation compensator.

Abstract: An input matching circuit is provided having the output impedance-frequency characteristics wherein the output impedance shows a value approximately equal to that of the gate input impedance of the FET at the frequency of the objective signal to be amplified, and the output impedance shows a value not more than twice the gate input impedance of the FET at least at the entire frequencies from the frequency of the objective signal to be amplified through twice the frequency of the objective signal to be amplified so that the matching between the input previous stage circuit and the gate of the FET can be secured. Thereby, a high-frequency power amplifier circuit and a high-frequency power amplifier module, which can suppress the occurrence of distortion, perform stably, and get miniaturized, are configured.