Patents by Inventor Fumitaka Nakayama

Fumitaka Nakayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9049453
    Abstract: In an encoding process of a moving image, a macro block as a unit of encoding is further divided into a plurality of DCT blocks or integer conversion blocks to detect an edge of each of the DCT blocks or the integer conversion blocks. Quantization control of the macro block is performed according to detected edge information.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: June 2, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Fumitaka Nakayama
  • Patent number: 8363719
    Abstract: An encoding apparatus comprises, a detection unit configured to determine a characteristic of the image of each of a plurality of blocks and to detect whether visual degradation in each block is noticeable, a determination unit configured to determine a quantization parameter of each block based on a detection result, a transformation unit configured to perform orthogonal transformation of the block and quantization using the quantization parameter, an encoding unit configured to perform variable-length encoding of a transformation result, an inverse transformation unit configured to inversely transform the transformation result to generate a locally decoded image, and a calculation unit configured to calculate a reference value to change a criterion to determine the characteristic of the image, wherein the detection unit detects a block having noticeable visual degradation by changing the criterion in accordance with the reference value.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: January 29, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Fumitaka Nakayama
  • Publication number: 20130002952
    Abstract: An image synthesizing apparatus which is capable of, when synthesizing moving images, carrying out an image synthesizing process without bringing about increases in processing time and the amount of transfer to memory irrespective of the number of images to be synthesized. A preset number of frames are synthesized to obtain a first synthesized image. When an image of another frame is to be synthesized with the first synthesized image, an image of a predetermined frame used for the synthesis obtaining the first synthesized image is subtracted from the first synthesized image, and the image of the other frame is added to the first synthesized image to generate a synthesized image.
    Type: Application
    Filed: June 22, 2012
    Publication date: January 3, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Fumitaka Nakayama
  • Patent number: 8080831
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: December 20, 2011
    Assignees: Renesas Electronics Corporation, Renesas Eastern Japan Semiconductor, Inc.
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20110127594
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: May 21, 2010
    Publication date: June 2, 2011
    Inventors: Fumitaka NAKAYAMA, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Patent number: 7741656
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: June 22, 2010
    Assignees: Renesas Technology Corporation, Renesas Eastern Japan Semiconductor, Inc.
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20100097156
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: December 22, 2009
    Publication date: April 22, 2010
    Inventors: Fumitaka NAKAYAMA, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20100097157
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: December 22, 2009
    Publication date: April 22, 2010
    Inventors: Fumitaka NAKAYAMA, Masatoshi MORIKAWA, Yutaka HOSHINO, Tetsuo UCHIYAMA
  • Patent number: 7671381
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: March 2, 2010
    Assignees: Renesas Eastern Japan Semiconductor, Inc., Renesas Technology Corporation
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20090110063
    Abstract: An encoding apparatus comprises, a detection unit configured to determine a characteristic of the image of each of a plurality of blocks and to detect whether visual degradation in each block is noticeable, a determination unit configured to determine a quantization parameter of each block based on a detection result, a transformation unit configured to perform orthogonal transformation of the block and quantization using the quantization parameter, an encoding unit configured to perform variable-length encoding of a transformation result, an inverse transformation unit configured to inversely transform the transformation result to generate a locally decoded image, and a calculation unit configured to calculate a reference value to change a criterion to determine the characteristic of the image, wherein the detection unit detects a block having noticeable visual degradation by changing the criterion in accordance with the reference value.
    Type: Application
    Filed: October 23, 2008
    Publication date: April 30, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Fumitaka Nakayama
  • Publication number: 20090108371
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: December 22, 2008
    Publication date: April 30, 2009
    Inventors: Fumitaka NAKAYAMA, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Patent number: 7479681
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: January 20, 2009
    Assignee: Renesas Eastern Technology Corp.
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Patent number: 7382972
    Abstract: In a recording apparatus, an input moving image signal and sound signal are separately encoded. The encoded moving image signal and sound signal are recorded on a recording medium. When a recording stop instruction is input, recording of the encoded moving image signal is stopped while recording of the encoded sound signal is continued until a predetermined period elapses from stop of recording of the encoded moving image signal.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: June 3, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventor: Fumitaka Nakayama
  • Publication number: 20070194407
    Abstract: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
    Type: Application
    Filed: April 12, 2007
    Publication date: August 23, 2007
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Patent number: 7217987
    Abstract: A semiconductor device includes a transmission power amplifier having cascaded MOSFET amplification stages disposed over a main surface of a semiconductor substrate. A CMOSFET control circuit controls the amplification stages. A first capacitor is also provided having upper and lower metal film electrodes formed over the main surface of the semiconductor substrate. The amplification stages are electrically coupled to one another via an inter-stage matching circuit which includes the first capacitor.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: May 15, 2007
    Assignees: Renesas Technology Corp., Renesas Eastern Japan Semiconductor, Inc.
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20060261442
    Abstract: A semiconductor device includes a transmission power amplifier having cascaded MOSFET amplification stages disposed over a main surface of a semiconductor substrate. A CMOSFET control circuit controls the amplification stages. A first capacitor is also provided having upper and lower metal film electrodes formed over the main surface of the semiconductor substrate. The amplification stages are electrically coupled to one another via an inter-stage matching circuit which includes the first capacitor.
    Type: Application
    Filed: July 27, 2006
    Publication date: November 23, 2006
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Patent number: 7087977
    Abstract: Plural elements forming a high frequency device in one chip are provided by forming a resistor element and the lower electrode of a capacitor element from one identical polycrystal silicon film over a substrate; forming the gate electrode of a power MISFET, upper electrode of the capacitor element, gate electrode of an n-channel type MISFET and gate electrode of a p-channel type MISFET from an identical polycrystal silicon film different from the other polycrystal silicon film and a WSi film; forming a capacitor element having a wiring formed on a silicon oxide film deposited over the substrate as a lower electrode and a wiring formed on the silicon oxide film as the upper electrode in the region MIN; forming a spiral coil in a region IND using an aluminum alloy film identical with that deposited on a silicon oxide film; and forming a bonding pad in a region PAD.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: August 8, 2006
    Assignees: Renesas Technology Corp., Renesas Eastern Japan Semiconductor, Inc.
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20060126729
    Abstract: In an encoding process of a moving image, a macro block as a unit of encoding is further divided into a plurality of DCT blocks or integer conversion blocks to detect an edge of each of the DCT blocks or the integer conversion blocks. Quantization control of the macro block is performed according to detected edge information.
    Type: Application
    Filed: December 9, 2005
    Publication date: June 15, 2006
    Inventor: Fumitaka Nakayama
  • Publication number: 20050098851
    Abstract: Plural elements forming a high frequency device in one chip are provided by forming a resistor element and the lower electrode of a capacitor element from one identical polycrystal silicon film over a substrate; forming the gate electrode of a power MISFET, upper electrode of the capacitor element, gate electrode of an n-channel type MISFET and gate electrode of a p-channel type MISFET from an identical polycrystal silicon film different from the other polycrystal silicon film and above and a WSi film; forming a capacitor element having a wiring formed on a silicon oxide film deposited over the substrate as a lower electrode and a wiring formed on the silicon oxide film as the upper electrode in the region MIN; forming a spiral coil in a region IND using an aluminum alloy film identical with that deposited on a silicon oxide film; and forming a bonding pad in a region PAD.
    Type: Application
    Filed: September 26, 2003
    Publication date: May 12, 2005
    Inventors: Fumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
  • Publication number: 20050063676
    Abstract: In a recording apparatus, an input moving image signal and sound signal are separately encoded. The encoded moving image signal and sound signal are recorded on a recording medium. When a recording stop instruction is input, recording of the encoded moving image signal is stopped while recording of the encoded sound signal is continued until a predetermined period elapses from stop of recording of the encoded moving image signal.
    Type: Application
    Filed: August 30, 2004
    Publication date: March 24, 2005
    Applicant: Canon Kabushiki Kaisha
    Inventor: Fumitaka Nakayama