Patents by Inventor Fumitake OKUTSU

Fumitake OKUTSU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11881248
    Abstract: The present invention provides a semiconductor module, a semiconductor member, and a method for manufacturing the same that make it possible to improve heat dissipation efficiency. This semiconductor module 1 comprises: a power supply unit 40; a RAM unit 50, which is a RAM module having a facing surface disposed so as to face an exposed surface of a logic chip 20 and an exposed surface of the power supply unit 40, the RAM module being disposed across some of a plurality of logic chip signal terminals 22 and some of a plurality of power supply unit power supply terminals 41; and a support substrate 10 having a power feeding circuit capable of feeding electrical power to the logic chip and to the power supply unit 40, one main surface of the support substrate 10 being disposed adjacent to a heat dissipation surface of the RAM unit 50, which is the surface of the RAM unit 50 opposite the facing surface.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: January 23, 2024
    Assignee: ULTRAMEMORY INC.
    Inventors: Fumitake Okutsu, Takao Adachi
  • Publication number: 20230156997
    Abstract: A memory unit having a plurality of memory chips comprises: the memory unit that has a plurality of memory chips that are stacked; and protruding terminals that are disposed protruding from a side surface along the stacking direction of the memory unit, wherein the protruding terminals have surfaces that are positioned in a direction orthogonal to the protrusion direction, and between said surfaces, the surface roughness of a surface facing one way is greater than the surface roughness of a surface facing the other way.
    Type: Application
    Filed: April 3, 2020
    Publication date: May 18, 2023
    Inventors: Fumitake OKUTSU, Takatoshi MASUDA
  • Publication number: 20220271006
    Abstract: A semiconductor module that enables reduction of manufacturing costs, a method for manufacturing the same, and a semiconductor module mounting body. The semiconductor module having a plurality of stacked dies includes: a first die; a second die disposed side by side with respect to the first die in a direction intersecting with a stacking direction; a third die disposed in the stacking direction, so as to straddle the first die and the second die and that is electrically connected to wiring surfaces of the first die and the second die opposing the third die; projection terminals projecting from the wiring surfaces of the first die and the second die and that project in a space adjacent to at least one of side surfaces of the third die in the direction intersecting with the stacking direction; and rewiring layers disposed so as to overlap with the projection terminals.
    Type: Application
    Filed: July 18, 2019
    Publication date: August 25, 2022
    Inventor: Fumitake OKUTSU
  • Publication number: 20220223531
    Abstract: A semiconductor module that can absorb thermal stress, and a manufacturing method therefor are provided. A semiconductor module includes a film interposer that includes a plurality of through electrodes which run in the thickness direction; a logic chip that is disposed on one surface side of the film interposer, and is connected electrically to the through electrodes; and a RAM unit that is a RAM module disposed on the other surface side of the film interposer, and connected electrically to the logic chip via the through electrodes.
    Type: Application
    Filed: May 31, 2019
    Publication date: July 14, 2022
    Inventors: Takatoshi MASUDA, Fumitake OKUTSU
  • Publication number: 20220139439
    Abstract: The present invention provides a semiconductor module, a semiconductor member, and a method for manufacturing the same that make it possible to improve heat dissipation efficiency. This semiconductor module 1 comprises: a power supply unit 40; a RAM unit 50, which is a RAM module having a facing surface disposed so as to face an exposed surface of a logic chip 20 and an exposed surface of the power supply unit 40, the RAM module being disposed across some of a plurality of logic chip signal terminals 22 and some of a plurality of power supply unit power supply terminals 41; and a support substrate 10 having a power feeding circuit capable of feeding electrical power to the logic chip and to the power supply unit 40, one main surface of the support substrate 10 being disposed adjacent to a heat dissipation surface of the RAM unit 50, which is the surface of the RAM unit 50 opposite the facing surface.
    Type: Application
    Filed: January 30, 2019
    Publication date: May 5, 2022
    Inventors: Fumitake OKUTSU, Takao ADACHI
  • Patent number: 11183484
    Abstract: The present invention is intended to provide a semiconductor module and a DIMM module that are capable of stably supplying power to a plurality of stacked memory chips, a manufacturing method of the semiconductor module and a manufacturing method of the DIMM module. The semiconductor module 1 having a plurality of memory chips 21 includes: a memory substrate 10 having a power supply circuit 12 exposed on an arrangement surface as one surface of the memory substrate 10; and at least one memory unit 20 arranged over the arrangement surface of the memory substrate 10. The memory unit 20 includes: the plurality of memory chips 21 stacked together such that a stacking direction D is along the arrangement surface; a through electrode 22 passing through the plurality of memory chips 21 in the stacking direction D; and an electrode layer 23 formed on one end surface in the stacking direction D and connected to the through electrode 22 and the power supply circuit 12.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: November 23, 2021
    Assignee: ULTRAMEMORY INC.
    Inventors: Fumitake Okutsu, Takao Adachi
  • Publication number: 20210143129
    Abstract: The present invention is intended to provide a semiconductor module and a DIMM module that are capable of stably supplying power to a plurality of stacked memory chips, a manufacturing method of the semiconductor module and a manufacturing method of the DIMM module. The semiconductor module 1 having a plurality of memory chips 21 includes: a memory substrate 10 having a power supply circuit 12 exposed on an arrangement surface as one surface of the memory substrate 10; and at least one memory unit 20 arranged over the arrangement surface of the memory substrate 10. The memory unit 20 includes: the plurality of memory chips 21 stacked together such that a stacking direction D is along the arrangement surface; a through electrode 22 passing through the plurality of memory chips 21 in the stacking direction D; and an electrode layer 23 formed on one end surface in the stacking direction D and connected to the through electrode 22 and the power supply circuit 12.
    Type: Application
    Filed: November 11, 2019
    Publication date: May 13, 2021
    Inventors: Fumitake OKUTSU, Takao ADACHI
  • Publication number: 20200357746
    Abstract: The objective of the invention is to provide a semiconductor module allowing the bandwidth between an MPU and a DRAM to be improved. This semiconductor module 1 comprises a logic chip 20, a RAM unit 40 which is a multi-layer RAM module, a spacer 60 disposed stacked over the RAM unit 40 in the layering direction thereof, an interposer 10 electrically connected to each of the logic chip 20 and the RAM unit 40, and a connection part 50 establishing a connection allowing for communication between the logic chip 20 and the RAM unit 40. The logic chip 20 and the spacer 60 are disposed to be adjacent to one another in a direction intersecting with the layering direction of the RAM unit 40, and the RAM unit 40 is placed on the interposer 10 while one end portion thereof overlaps with one end portion of the logic chip 20 in the layering direction. The connection part 50 connects the one end portion of the RAM unit 40 to the one end portion of the logic chip 20.
    Type: Application
    Filed: November 21, 2017
    Publication date: November 12, 2020
    Inventors: Yasuji KOSHIKAWA, Fumitake OKUTSU