Patents by Inventor Fumito Shoji

Fumito Shoji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220084813
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes loading a substrate into a processing container, airtightly sealing the processing container in which the substrate has been loaded, reducing a pressure of the processing container airtightly sealed, supplying a processing solution into the processing container with reduced pressure, performing a process on the substrate using the processing solution, discharging the processing solution used for the process from the processing container, after discharging the processing solution, opening the processing container, and unloading the substrate subjected to the process out of the processing container.
    Type: Application
    Filed: March 12, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Makoto IYAMA, Fumito SHOJI, Masatoshi SHOMURA
  • Patent number: 10985006
    Abstract: An electrolytic plating apparatus includes a plating tank that is filled with plating liquid; a moving mechanism configured to vertically move a processing target substrate in a direction normal to a surface of the plating liquid; a seal member that is disposed at a peripheral edge portion of a processing target surface of a processing target substrate and is configured to seal the plating liquid to a center side of the processing target surface when the processing target substrate is immersed in the plating tank; and a contact member that is separated from the seal member and is electrically connected to the processing target surface.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: April 20, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Fumito Shoji, Tatsuo Migita, Masahiko Murano
  • Patent number: 10971400
    Abstract: A semiconductor device includes a device layer having a semiconductor element and a wiring layer, a first structure, a second structure at an outer periphery of the first structure and having a thickness smaller than that of the first structure, and a conductive layer that covers the first structure and the second structure. The first structure comprises a first substrate having the device layer formed on a first surface thereof and a through hole formed through a second surface thereof that is opposite to the first surface to reach the device layer, and an inner portion of a second substrate facing the first surface and bonded to the first surface by a first adhesive layer.
    Type: Grant
    Filed: September 2, 2019
    Date of Patent: April 6, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Masahiko Murano, Fumito Shoji, Tatsuo Migita, Ippei Kume
  • Publication number: 20200273749
    Abstract: A semiconductor device includes a device layer having a semiconductor element and a wiring layer, a first structure, a second structure at an outer periphery of the first structure and having a thickness smaller than that of the first structure, and a conductive layer that covers the first structure and the second structure. The first structure comprises a first substrate having the device layer formed on a first surface thereof and a through hole formed through a second surface thereof that is opposite to the first surface to reach the device layer, and an inner portion of a second substrate facing the first surface and bonded to the first surface by a first adhesive layer.
    Type: Application
    Filed: September 2, 2019
    Publication date: August 27, 2020
    Inventors: Masahiko MURANO, Fumito SHOJI, Tatsuo MIGITA, Ippei KUME
  • Publication number: 20190295836
    Abstract: An electrolytic plating apparatus includes a plating tank that is filled with plating liquid; a moving mechanism configured to vertically move a processing target substrate in a direction normal to a surface of the plating liquid; a seal member that is disposed at a peripheral edge portion of a processing target surface of a processing target substrate and is configured to seal the plating liquid to a center side of the processing target surface when the processing target substrate is immersed in the plating tank; and a contact member that is separated from the seal member and is electrically connected to the processing target surface.
    Type: Application
    Filed: August 27, 2018
    Publication date: September 26, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Fumito SHOJI, Tatsuo MIGITA, Masahiko MURANO
  • Patent number: 9941165
    Abstract: A semiconductor manufacturing method includes forming a first metal film on a semiconductor wafer by plating, ejecting liquid from a washer bar spaced from the wafer while rotating at least one of the washer and the semiconductor, and forming a second metal film on the first metal film. A plurality of nozzles are located on the washer bar and displaced from the position of the washer bar opposed to the center of the wafer, and a greater number of nozzles are adjacent the peripheral area of the semiconductor wafer than the central area of the semiconductor wafer. The nozzles in the peripheral area of the wafer eject the washing liquid in a direction inclined from the direction of the washer bar, and a nozzle arranged on the central area of the one main surface of the semiconductor wafer ejects the washing liquid towards the center position of the semiconductor wafer.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: April 10, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Tatsuo Migita, Fumito Shoji, Koji Ogiso
  • Publication number: 20170263499
    Abstract: A semiconductor manufacturing method includes forming a first metal film on a semiconductor wafer by plating, ejecting liquid from a washer bar spaced from the wafer while rotating at least one of the washer and the semiconductor, and forming a second metal film on the first metal film. A plurality of nozzles are located on the washer bar and displaced from the position of the washer bar opposed to the center of the wafer, and a greater number of nozzles are adjacent the peripheral area of the semiconductor wafer than the central area of the semiconductor wafer. The nozzles in the peripheral area of the wafer eject the washing liquid in a direction inclined from the direction of the washer bar, and a nozzle arranged on the central area of the one main surface of the semiconductor wafer ejects the washing liquid towards the center position of the semiconductor wafer.
    Type: Application
    Filed: August 8, 2016
    Publication date: September 14, 2017
    Inventors: Tatsuo MIGITA, Fumito SHOJI, Koji OGISO
  • Publication number: 20120217497
    Abstract: According to one embodiment, a manufacturing method for a semiconductor device includes: forming a test pattern with a metal film embedded therein through a plating process; detecting a characteristic of the test pattern; and adjusting a condition for the plating process based on the detected characteristic of the test pattern. The test pattern is formed over three or more wiring layers and includes a stacked via in an intermediate layer.
    Type: Application
    Filed: January 17, 2012
    Publication date: August 30, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Fumito Shoji, Noriteru Yamada
  • Publication number: 20120067732
    Abstract: A plating apparatus includes a plating bath configured to perform plating processing of a substrate with a plating solution including an inorganic constituent and an organic constituent introduced into the plating bath, a chemical supplying unit configured to supply each chemical of the inorganic constituent and the organic constituent, an electrode configured to dispose in the plating solution and the electrode configured to selectively adsorb a by-product produced from the organic constituent, and an electric current applying unit configured to apply a predetermined electric current to the electrode.
    Type: Application
    Filed: March 8, 2011
    Publication date: March 22, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Fumito Shoji, Hiroshi Ota
  • Publication number: 20080271989
    Abstract: An apparatus for plating includes a plating bath for plating copper (Cu) film on the surface of a substrate under a prescribed plating condition using a plating solution, a chemical supplying unit for supplying each components constituting the plating solution into the plating bath, a plating solution analyzing unit for analyzing a concentration of a predetermined component contained in the plating solution, a plating controlling unit for storing correlation data between a parameter representing a state of the plating solution and the plating condition, extracting the parameter relating the plating solution, and determining the predetermined plating condition based on the parameter and the stored correlation data.
    Type: Application
    Filed: April 23, 2008
    Publication date: November 6, 2008
    Inventors: Fumito Shoji, Yoshio Kasai, Kazuhiro Murakami