Abstract: The performances of a semiconductor device are improved. A semiconductor device has a transfer transistor and a photodiode. The photodiode has an n type semiconductor region, an n+ type semiconductor region, and a second p type semiconductor region surrounded by a first p type semiconductor region of an interpixel isolation region. The n+ type semiconductor region is formed on the main surface side of the semiconductor substrate, and the n type semiconductor region is formed under the n+ type semiconductor region via the second p type semiconductor region. In the channel length direction of the transfer transistor, in the n type semiconductor region, an n?? type semiconductor region having a lower impurity density than that of the n type semiconductor region is arranged, to improve the transfer efficiency of electric charges accumulated in the photodiode.

Abstract: In order to improve the performance of a solid-state imaging device, the solid-state imaging device has a pixel including a photoelectric conversion unit and a transfer transistor, and fluorine is introduced to a gate electrode and a drain region (extension region and n+-type semiconductor region) of the transfer transistor included in the pixel.

Abstract: A reduction is achieved in the power consumption of a solid-state imaging element including a photoelectric conversion element which converts incident light to charge and a transistor which converts the charge obtained in the photoelectric conversion element to voltage. A photodiode and a charge read transistor which are included in a pixel in the CMOS solid-state imaging element are provided in a semiconductor substrate, while an amplification transistor included in the foregoing pixel is provided in a semiconductor layer provided over the semiconductor substrate via a buried insulating layer. In the semiconductor substrate located in a buried insulating layer region, a p+-type back-gate semiconductor region for controlling a threshold voltage of the amplification transistor is provided.

Abstract: In order to improve the performance of a solid-state imaging device, the solid-state imaging device has a pixel including a photoelectric conversion unit and a transfer transistor, and fluorine is introduced to a gate electrode and a drain region (extension region and n+-type semiconductor region) of the transfer transistor included in the pixel.

Abstract: A reduction is achieved in the power consumption of a solid-state imaging element including a photoelectric conversion element which converts incident light to charge and a transistor which converts the charge obtained in the photoelectric conversion element to voltage. A photodiode and a charge read transistor which are included in a pixel in the CMOS solid-state imaging element are provided in a semiconductor substrate, while an amplification transistor included in the foregoing pixel is provided in a semiconductor layer provided over the semiconductor substrate via a buried insulating layer. In the semiconductor substrate located in a buried insulating layer region, a p+-type back-gate semiconductor region for controlling a threshold voltage of the amplification transistor is provided.

Abstract: A semiconductor device which improves the dark current characteristics and transfer efficiency of a back-surface irradiation CMOS image sensor without an increase in the area of a semiconductor chip. In the CMOS image sensor, a pixel includes a transfer transistor and a photodiode with a pn junction. In plan view, a reflecting layer is formed over an n-type region which configures the photodiode, through an isolation insulating film. The reflecting layer extends over the gate electrode of the transfer transistor through a cap insulating film. A first layer signal wiring is electrically coupled to both the gate electrode and the reflecting layer through a contact hole made in an interlayer insulating film over the gate electrode, so the same potential is applied to the gate electrode and the reflecting layer.

Abstract: The performances of a semiconductor device are improved. A semiconductor device has a transfer transistor and a photodiode. The photodiode has an n type semiconductor region, an n+ type semiconductor region, and a second p type semiconductor region surrounded by a first p type semiconductor region of an interpixel isolation region. The n+ type semiconductor region is formed on the main surface side of the semiconductor substrate, and the n type semiconductor region is formed under the n+ type semiconductor region via the second p type semiconductor region. In the channel length direction of the transfer transistor, in the n type semiconductor region, an n?? type semiconductor region having a lower impurity density than that of the n type semiconductor region is arranged, to improve the transfer efficiency of electric charges accumulated in the photodiode.

Abstract: The semiconductor device includes a semiconductor substrate having a main surface and a back surface, an device isolation film, formed over the main surface of the semiconductor substrate and having a first surface making contact with the main surface and a second surface opposed to the first surface, a plate electrode disposed over the device isolation film in contact with the second surface of the device isolation film, and a pad electrode disposed adjacent to the first surface of the device isolation film and making contact with the plate electrode. The semiconductor substrate has a first opening that passes therethrough from the back surface to the main surface and exposes the device isolation film. The device isolation film has a second opening located in the first opening and exposes a part of the plate electrode. The pad electrode is formed in the second opening and extends over the first surface of the device isolation film.

Abstract: In an imaging device, a multilayered wiring structure is formed so as to cover a photodiode and so forth in a pixel region and a pixel transistor in a peripheral circuit region. A passivation film is formed so as to cover the multilayered wiring structure. The passivation film is interposed between a fourth interlayer insulation film and a color filter and extends from the pixel region to the peripheral circuit region in contact with the fourth interlayer insulation film. The passivation film in the peripheral circuit region is formed with a film thickness that is thicker than that of the passivation film in the pixel region.