Patents by Inventor Fumiyoshi Kawashiro

Fumiyoshi Kawashiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8071472
    Abstract: A semiconductor device includes a substrate, a metal layer, an alloy layer and a Sn—Ag—Cu-based solder ball. The metal layer is configured to be formed on the substrate. The alloy layer is configured to be formed on the metal layer. The Sn—Ag—Cu-based solder ball is configured to be placed on the alloy layer. The alloy layer includes Ni and Zn as essential elements.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: December 6, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Fumiyoshi Kawashiro
  • Publication number: 20110233768
    Abstract: A semiconductor device includes: an interconnection substrate on which a semiconductor chip is mounted; electrodes formed on a surface of the interconnection substrate; and solder bumps formed on the electrodes. The solder bump includes a base section and a surface layer section that covers the base section. The surface layer section includes conductive metal selected from the group consisting of Cu, Ni, Au, and Ag, and Sn at least and a ratio of the number of atoms of the conductive metal to the number of Sn atoms per a unit volume is more than 0.01.
    Type: Application
    Filed: March 22, 2011
    Publication date: September 29, 2011
    Inventor: Fumiyoshi KAWASHIRO
  • Publication number: 20110237065
    Abstract: Soldering flux includes: a solvent of which solubility in water is more than 0.01% by weight and less than 6.8% by weight; an organic acid component; and amine counteracting the organic acid component. A solubility of the amine in water is more than 5.0% by weight, and the amine is able to be linked to a conductive metal via a coordination linkage. A solder bump is formed by heating a solder ball with the soldering flux. The residue of the flux on the surface of the solder bump has water solubility, and is easily eliminated. Further, the conductive metal coordinated to the amine is deposited on the surface of the solder bump by water washing. As a result, when testing the semiconductor device having the solder bump 7 by a contact pin contacting with the solder bump, the contact pin is prevented from contamination, the contact pin is certainly contacted with the solder bump, and the semiconductor device is accurately tested.
    Type: Application
    Filed: March 22, 2011
    Publication date: September 29, 2011
    Inventor: Fumiyoshi KAWASHIRO
  • Publication number: 20110215462
    Abstract: A method of manufacturing semiconductor devices is provided, in which a resin sealing structure includes an interconnection substrate board, semiconductor chips, a heat radiation plate, and sealing resin. The method is achieved by cutting the heat radiation plate by a plate cutting blade in a first direction along a first heat radiation plate cutting line; by cutting the heat radiation plate by the plate cutting blade in a second direction along a second heat radiation plate cutting line, after cutting in the first direction by the plate cutting blade; and by cutting the interconnection substrate board and the sealing resin along first and second interconnection substrate board cutting lines by a substrate board cutting blade in the first direction and the second direction, respectively. The second heat radiation plate cutting line and the second interconnection substrate board cutting line correspond to each other in position in a third direction orthogonal to the first direction and the second direction.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 8, 2011
    Inventor: Fumiyoshi KAWASHIRO
  • Patent number: 7944051
    Abstract: In one embodiment, a semiconductor device has a semiconductor element made up of a semiconductor chip, first solder balls provided on the semiconductor chip and a BGA substrate on which the semiconductor chip is mounted via the first solder balls. Furthermore, the semiconductor device has external terminals on a surface of the BGA substrate opposing to a surface on which the semiconductor chip is mounted. The external terminals include oxide films provided with through holes.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: May 17, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Fumiyoshi Kawashiro
  • Publication number: 20110104872
    Abstract: A semiconductor device manufacturing method includes cutting a resin sealing body into a plurality of pieces, in which the resin sealing body includes a plurality of semiconductor chips mounted on a wiring board, a heat spreader disposed above the plurality of the semiconductor chips, and a sealing resin filled between the wiring board and the heat spreader. The cutting the resin sealing body includes shaving the resin sealing body from a side of the heat spreader, and shaving the resin sealing body from a side of the wiring board. The shaving the resin sealing body from the side of the heat spreader includes etching the heat spreader.
    Type: Application
    Filed: January 12, 2011
    Publication date: May 5, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuko Sato, Takehiko Maeda, Fumiyoshi Kawashiro
  • Publication number: 20110042802
    Abstract: A semiconductor device includes an electrode pad and an external connection terminal. The external connection terminal contains Sn equal to or more than 50 wt %, Sn and Pb equal to or more than 90 wt % in total, or Pb equal to or more than 85 wt %, and the surface thereof is coated with an Au layer. The thickness of the Au layer is preferably equal to or more than 10 nm and equal to or less than 1 ?m. The weight of the Au layer is preferably equal to or less than 0.6% of the weight of the external connection terminal.
    Type: Application
    Filed: July 19, 2010
    Publication date: February 24, 2011
    Applicant: NEC Electronics Corporation
    Inventor: Fumiyoshi Kawashiro
  • Publication number: 20100144136
    Abstract: A semiconductor device includes a substrate, a metal layer, an alloy layer and a Sn—Ag—Cu-based solder ball. The metal layer is configured to be formed on the substrate. The alloy layer is configured to be formed on the metal layer. The Sn—Ag—Cu-based solder ball is configured to be placed on the alloy layer. The alloy layer includes Ni and Zn as essential elements.
    Type: Application
    Filed: February 16, 2010
    Publication date: June 10, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Fumiyoshi KAWASHIRO
  • Publication number: 20100105170
    Abstract: A method for manufacturing a semiconductor device includes cutting a resin sealing body into a plurality of pieces. The resin sealing body includes a plurality of semiconductor chips mounted on a wiring board, a heat spreader disposed above the plurality of the semiconductor chips, and sealing resin filled between the wiring board and the heat spreader. The cutting the resin sealing body includes shaving the resin sealing body from a side of the heat spreader and shaving the resin sealing body from a side of the wiring board. The method prevents the heat spreader from generation of burrs.
    Type: Application
    Filed: October 19, 2009
    Publication date: April 29, 2010
    Applicant: NEC Electronics Corporation
    Inventors: Yuko Sato, Takehiko Maeda, Fumiyoshi Kawashiro
  • Patent number: 7701061
    Abstract: A semiconductor device includes a substrate, a metal layer, an alloy layer and a Sn—Ag—Cu-based solder ball. The metal layer is configured to be formed on the substrate. The alloy layer is configured to be formed on the metal layer. The Sn—Ag—Cu-based solder ball is configured to be placed on the alloy layer. The alloy layer includes Ni and Zn as essential elements.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: April 20, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Fumiyoshi Kawashiro
  • Publication number: 20090230175
    Abstract: A flux for soldering of the present invention, in connecting a mounting pad exposed on a board to a solder ball, is applied onto at least one of a surface of the mounting pad and the solder ball. The flux for soldering contains a solvent, and the solvent contains a compound, which is represented by a general formula (1) and having a boiling point of 218° C. or higher and 240° C. or lower: R1-R2n-OH . . . (1).
    Type: Application
    Filed: March 6, 2009
    Publication date: September 17, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Fumiyoshi Kawashiro
  • Publication number: 20090026615
    Abstract: In one embodiment, a semiconductor device has a semiconductor element made up of a semiconductor chip, first solder balls provided on the semiconductor chip and a BGA substrate on which the semiconductor chip is mounted via the first solder balls. Furthermore, the semiconductor device has external terminals on a surface of the BGA substrate opposing to a surface on which the semiconductor chip is mounted. The external terminals include oxide films provided with through holes.
    Type: Application
    Filed: July 22, 2008
    Publication date: January 29, 2009
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Fumiyoshi Kawashiro
  • Publication number: 20070096318
    Abstract: A semiconductor device includes a substrate, a metal layer, an alloy layer and a Sn—Ag—Cu-based solder ball. The metal layer is configured to be formed on the substrate. The alloy layer is configured to be formed on the metal layer. The Sn—Ag—Cu-based solder ball is configured to be placed on the alloy layer. The alloy layer includes Ni and Zn as essential elements.
    Type: Application
    Filed: October 27, 2006
    Publication date: May 3, 2007
    Inventor: Fumiyoshi KAWASHIRO