Patents by Inventor Fumiyuki Adachi

Fumiyuki Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11432704
    Abstract: An image pickup apparatus includes: a plurality of image pickup devices configured to pick up images of a same object and sequentially read the images for each line; an objective optical system configured to form the images at different image-forming positions on the image pickup devices; a memory configured to record predetermined time differences for reading the leading positions of the effective pixels of the images at the same timing; and an I2C control circuit configured to control the image reading timing of the image pickup devices by generating a plurality of synchronizing signals based on a master synchronizing signal and supplying the synchronizing signals to the image pickup devices after shifting the synchronizing signals by the respective predetermined time differences.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: September 6, 2022
    Assignee: OLYMPUS CORPORATION
    Inventor: Fumiyuki Adachi
  • Patent number: 10750110
    Abstract: An endoscope includes a cable in which a first clock signal wire and a second clock signal wire are provided inside and a differential clock signal receiving section for clocks to be supplied to an image pickup device, and a video processor includes a current detector inserted in VCCI/O for the differential clock signal receiving section, a differential signal output section configured to perform conversion into two differential clock signals, respective phases of the two differential clock signals being reverse of each other, and output the two differential clock signals, and an FPGA configured to, based on a current value detected by the current detector, determine a short or an open in the first clock signal wire and the second clock signal wire.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: August 18, 2020
    Assignee: OLYMPUS CORPORATION
    Inventor: Fumiyuki Adachi
  • Publication number: 20200015667
    Abstract: An image pickup apparatus includes: a plurality of image pickup devices configured to pick up images of a same object and sequentially read the images for each line; an objective optical system configured to form the images at different image-forming positions on the image pickup devices; a memory configured to record predetermined time differences for reading the leading positions of the effective pixels of the images at the same timing; and an I2C control circuit configured to control the image reading timing of the image pickup devices by generating a plurality of synchronizing signals based on a master synchronizing signal and supplying the synchronizing signals to the image pickup devices after shifting the synchronizing signals by the respective predetermined time differences.
    Type: Application
    Filed: September 20, 2019
    Publication date: January 16, 2020
    Applicant: OLYMPUS CORPORATION
    Inventor: Fumiyuki ADACHI
  • Publication number: 20190116332
    Abstract: An endoscope includes a cable in which a first clock signal wire and a second clock signal wire are provided inside and a differential clock signal receiving section for clocks to be supplied to an image pickup device, and a video processor includes a current detector inserted in VCCI/O for the differential clock signal receiving section, a differential signal output section configured to perform conversion into two differential clock signals, respective phases of the two differential clock signals being reverse of each other, and output the two differential clock signals, and an FPGA configured to, based on a current value detected by the current detector, determine a short or an open in the first clock signal wire and the second clock signal wire.
    Type: Application
    Filed: December 4, 2018
    Publication date: April 18, 2019
    Applicant: OLYMPUS CORPORATION
    Inventor: Fumiyuki ADACHI
  • Patent number: 10084636
    Abstract: In a transmission apparatus, a mapper maps frequency components of an analog signal at equally spaced discrete locations within a transmission frequency band, a time-division multiplexer time-division multiplexes the analog signal and a preamble signal to generate a transmission signal, the preamble signal being a digital signal whose frequency components are continuously mapped over the transmission frequency band, and a transmitter transmits the transmission signal, wherein an autocorrelation value of the transmission signal being to be used for timing synchronization at a reception apparatus that receives the transmission signal.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: September 25, 2018
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Yasuaki Yuda, Seigo Nakao, Masayuki Hoshino, Tetsuya Yamamoto, Fumiyuki Adachi
  • Patent number: 9806726
    Abstract: A spread spectrum clock generator includes: a phase comparing unit that receives a reference clock signal and a feedback clock signal, and generates a control voltage corresponding to a phase difference between the reference clock signal and the feedback clock signal; a voltage-controlled oscillator that oscillates at an oscillating frequency corresponding to the control voltage, and generates an output clock signal; a delta-sigma modulator that receives a waveform signal for controlling spreading of a spectrum of the output clock signal, and outputs bits larger than 1 bit based on the waveform signal; a control circuit that controls a multiplication number according to an output signal of the delta-sigma modulator; and a divider that generates the feedback clock signal by dividing the output clock signal according to the multiplication number controlled by the control circuit, and supplies the feedback clock signal to the phase comparing unit.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: October 31, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Fumiyuki Adachi
  • Publication number: 20170222652
    Abstract: A spread spectrum clock generator includes: a phase comparing unit that receives a reference clock signal and a feedback clock signal, and generates a control voltage corresponding to a phase difference between the reference clock signal and the feedback clock signal; a voltage-controlled oscillator that oscillates at an oscillating frequency corresponding to the control voltage, and generates an output clock signal; a delta-sigma modulator that receives a waveform signal for controlling spreading of a spectrum of the output clock signal, and outputs bits larger than 1 bit based on the waveform signal; a control circuit that controls a multiplication number according to an output signal of the delta-sigma modulator; and a divider that generates the feedback clock signal by dividing the output clock signal according to the multiplication number controlled by the control circuit, and supplies the feedback clock signal to the phase comparing unit.
    Type: Application
    Filed: April 18, 2017
    Publication date: August 3, 2017
    Inventor: Fumiyuki ADACHI
  • Patent number: 9660657
    Abstract: A spread spectrum clock generator includes: a phase comparing unit that receives a reference clock signal and a feedback clock signal, and generates a control voltage corresponding to a phase difference between the reference clock signal and the feedback clock signal; a voltage-controlled oscillator that oscillates at an oscillating frequency corresponding to the control voltage, and generates an output clock signal; a delta-sigma modulator that receives a waveform signal for controlling spreading of a spectrum of the output clock signal, and outputs bits larger than 1 bit based on the waveform signal; a control circuit that controls a multiplication number according to an output signal of the delta-signal modulator; and a divider that generates the feedback clock signal by dividing the output clock signal according to the multiplication number controlled by the control circuit, and supplies the feedback clock signal to the phase comparing unit.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: May 23, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Fumiyuki Adachi
  • Patent number: 9525516
    Abstract: A transmission device capable of reducing packet receiving errors and the number of retransmissions by improving error correction coding gain without increasing the amount of resources used in transmission. The transmission device (100) that transmits each bit of coded data constituted from systematic bits and parity bits in order for each transmission unit, and performs frequency puncturing to puncture, in units of symbols, data to be punctured in which each bit has been superimposed on a plurality of frequency domain symbols. A time puncturing unit (102) extracts transmission unit data from the coded data and a frequency puncturing unit (105) performs frequency puncturing in accordance with the ratio of parity bits to systematic bits included in the data.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: December 20, 2016
    Assignee: PANASONIC CORPORATION
    Inventors: Ryohei Kimura, Toru Oizumi, Shinsuke Takaoka, Yasuaki Yuda, Daichi Imamura, Fumiyuki Adachi, Tetsuya Yamamoto
  • Publication number: 20160301557
    Abstract: In a transmission apparatus, a mapper maps frequency components of an analog signal at equally spaced discrete locations within a transmission frequency band, a time-division multiplexer time-division multiplexes the analog signal and a preamble signal to generate a transmission signal, the preamble signal being a digital signal whose frequency components are continuously mapped over the transmission frequency band, and a transmitter transmits the transmission signal, wherein an autocorrelation value of the transmission signal being to be used for timing synchronization at a reception apparatus that receives the transmission signal.
    Type: Application
    Filed: June 23, 2016
    Publication date: October 13, 2016
    Inventors: YASUAKI YUDA, SEIGO NAKAO, MASAYUKI HOSHINO, TETSUYA YAMAMOTO, FUMIYUKI ADACHI
  • Patent number: 9386547
    Abstract: An SC-FDMA transmission device capable of achieving excellent error rate characteristics on any propagation channel, wherein a determination unit (151) determines the ratio of the frequency puncturing amount to the time puncturing amount in the total puncturing amount on the basis of a puncturing determination rule, and a setting unit (152) sets the time puncturing amount and the frequency puncturing amount on the basis of this ratio. Here, in the puncturing determination rule, the ratio is determined from the MCS of the encoded data, the number of resources allocated to the encoded data, and the delay spread of the propagation channel between a receiving device and the transmission device (100).
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: July 5, 2016
    Assignee: PANASONIC CORPORATION
    Inventors: Ryohei Kimura, Toru Oizumi, Yoshihiko Ogawa, Daichi Imamura, Fumiyuki Adachi, Tetsuya Yamamoto
  • Publication number: 20160049947
    Abstract: A spread spectrum clock generator includes: a phase comparing unit that receives a reference clock signal and a feedback clock signal, and generates a control voltage corresponding to a phase difference between the reference clock signal and the feedback clock signal; a voltage-controlled oscillator that oscillates at an oscillating frequency corresponding to the control voltage, and generates an output clock signal; a delta-sigma modulator that receives a waveform signal for controlling spreading of a spectrum of the output clock signal, and outputs bits larger than 1 bit based on the waveform signal; a control circuit that controls a multiplication number according to an output signal of the delta-signal modulator; and a divider that generates the feedback clock signal by dividing the output clock signal according to the multiplication number controlled by the control circuit, and supplies the feedback clock signal to the phase comparing unit.
    Type: Application
    Filed: July 21, 2015
    Publication date: February 18, 2016
    Applicant: Renesas Electronics Corporation
    Inventor: Fumiyuki ADACHI
  • Publication number: 20140233482
    Abstract: A transmission device capable of reducing packet receiving errors and the number of retransmissions by improving error correction coding gain without increasing the amount of resources used in transmission. The transmission device (100) that transmits each bit of coded data constituted from systematic bits and parity bits in order for each transmission unit, and performs frequency puncturing to puncture, in units of symbols, data to be punctured in which each bit has been superimposed on a plurality of frequency domain symbols. A time puncturing unit (102) extracts transmission unit data from the coded data and a frequency puncturing unit (105) performs frequency puncturing in accordance with the ratio of parity bits to systematic bits included in the data.
    Type: Application
    Filed: August 16, 2012
    Publication date: August 21, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Ryohei Kimura, Toru Oizumi, Shinsuke Takaoka, Yasuaki Yuda, Daichi Imamura, Fumiyuki Adachi, Tetsuya Yamamoto
  • Publication number: 20140226586
    Abstract: An SC-FDMA transmission device capable of achieving excellent error rate characteristics on any propagation channel, wherein a determination unit (151) determines the ratio of the frequency puncturing amount to the time puncturing amount in the total puncturing amount on the basis of a puncturing determination rule, and a setting unit (152) sets the time puncturing amount and the frequency puncturing amount on the basis of this ratio. Here, in the puncturing determination rule, the ratio is determined from the MCS of the encoded data, the number of resources allocated to the encoded data, and the delay spread of the propagation channel between a receiving device and the transmission device (100).
    Type: Application
    Filed: August 16, 2012
    Publication date: August 14, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Ryohei Kimura, Toru Oizumi, Yoshihiko Ogawa, Daichi Imamura, Fumiyuki Adachi, Tetsuya Yamamoto
  • Patent number: 8737246
    Abstract: A wireless transmission apparatus able to reliably increase outage capacity according to the state of a propagation path.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: May 27, 2014
    Assignee: Panasonic Corporation
    Inventors: Yoshiko Saito, Shinsuke Takaoka, Daichi Imamura, Seigo Nakao, Fumiyuki Adachi, Megumi Ichikawa
  • Publication number: 20120014279
    Abstract: A wireless transmission apparatus able to reliably increase outage capacity according to the state of a propagation path.
    Type: Application
    Filed: February 23, 2010
    Publication date: January 19, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Kenichi Miyoshi, Megumi Ichikawa, Yoshiko Saito, Shinsuke Takaoka, Daichi Imamura, Seigo Nakao, Fumiyuki Adachi
  • Publication number: 20110286502
    Abstract: Disclosed is a wireless transmitter that can prevent deterioration of the error rate characteristic without reducing the data rate during mobile communications also utilizing THP for FDE. In the device, an equivalent channel matrix computation unit (118) computes weights to be used for FDE of a transmission block and an equivalent channel matrix indicating equivalent channels that are generated from channel impulse responses, and a decomposition unit (119) obtains a lower triangular matrix (L), that consists of a diagonal element that includes a high channel quality at the front of the transmitting block and a low channel quality at the rear, so as to indicate the channel quality of the transmission block, and an element indicating interference with the transmission block, and a unitary matrix (Q) by means of LQ decomposition of the equivalent channel matrix.
    Type: Application
    Filed: September 11, 2009
    Publication date: November 24, 2011
    Applicant: Panasonic Corporation
    Inventors: Fumiyuki Adachi, Kazuki Takeda, Shinsuke Takaoka, Kenichi Miyoshi, Megumi Ichikawa
  • Patent number: 7920659
    Abstract: A wireless communication apparatus capable of enhancing the transmission efficiency, while maintaining a good BER characteristic. In this apparatus, a setting part (13) sets, based on the maximum delay amount of a delayed wave and also based on the expansion of impulse response of FDE, an FFT part (14) to establish an FFT section of Nc symbol, and also sets a selecting part (17) to establish a selection section of Nc?2M?? symbol that is shorter than the FFT section. The setting part (13) also sets the start points of FFT and selection sections established at this time for such timings that they are shifted by Nc?2M?? symbol from the start points of the FFT and selection sections previously established. It should be noted that the maximum delay amount of the delayed wave is ? symbol, the expansion of impulse response of FDE is plus/minus M symbols, and the symbol block length is Nc.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: April 5, 2011
    Assignee: Panasonic Corporation
    Inventors: Akihiko Nishio, Katsuhiko Hiramatsu, Fumiyuki Adachi, Kazuaki Takeda, Hiromichi Tomeba
  • Patent number: 7903748
    Abstract: A communication technology for allowing a mobile communication system to accommodate variable rate users, while obtaining a frequency diversity effect. A transmitter apparatus using, for transmission, transmission signals produced based on data symbols of a predetermined transmission method, comprising an FFT processing part for converting the data symbols to frequency domain data; an interleaver for sorting the frequency domain data; and an IFFT processing part for converting the sorted frequency domain data to a time domain signal; wherein the FFT processing part subjects Q received data symbols to Q-point FFT processing, the interleaver produces N data from Q data outputted from the FFT processing part (where N>Q), and the IFFT processing part subjects the N data outputted from the interleaver to N-point IFFT processing.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: March 8, 2011
    Assignee: Intelligent Cosmos Research Institute
    Inventor: Fumiyuki Adachi
  • Publication number: 20100189192
    Abstract: Provided is a radio transmission device which can improve an error ratio characteristic in a radio communication system which performs precoding. There are two types of modulation methods: a first modulation method having a small error ratio improvement width by precoding and a second modulation method having a large error ratio improvement width by precoding. In the radio transmission device (100), a modulation unit (101) modulates transmission data by the second modulation method so as to generate a symbol, a copying unit (102) copies the symbol so as to generate a plurality of symbols, and a precoding unit (105) performs precoding of the symbols.
    Type: Application
    Filed: June 26, 2008
    Publication date: July 29, 2010
    Applicant: Panasonic Corporation
    Inventors: Kenichi Miyoshi, Shinsuke Takaoka, Fumiyuki Adachi, Hiromichi Tomeea, Kazuki Takeda