Patents by Inventor Fumiyuki Nihey

Fumiyuki Nihey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7518247
    Abstract: There has been a problem that micromiaturization causes increase of the resistance of wiring structure and degradation of electron migration resistance and stress migration resistance. The present invention provides a wiring structure of a semiconductor device having a low resistance even when the semiconductor device is microminiaturized, free of electron migration and stress migration, and having a high reliability and a method for manufacturing the same. A semiconductor device having a wiring or a connection plug made of a mixture of a metal and carbon nanotubes berried in a wiring groove or a via hole made in an insulating film on a substrate where a semiconductor chip is fabricated, and its manufacturing method are provided.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: April 14, 2009
    Assignee: NEC Corporation
    Inventors: Toshitsugu Sakamoto, Hisao Kawaura, Toshio Baba, Fumiyuki Nihey, Yukinori Ochiai, Hiroo Hongo
  • Patent number: 7357984
    Abstract: By coating the outer surface of carbon nanotubes with various polymers of different properties, such properties as insulation property, reactivity, optical visibility, solvent dispersion property and so on are given to the outer surface of the carbon nanotubes.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: April 15, 2008
    Assignees: Incorporated Administrative Agency National Agriculture and Bio-Oriented Research Organization, NEC Corporation
    Inventors: Kazunori Otobe, Hidenobu Nakao, Hideki Hayashi, Fumiyuki Nihey
  • Publication number: 20060091557
    Abstract: There has been a problem that micromiaturization causes increase of the resistance of wiring structure and degradation of electron migration resistance and stress migration resistance. The present invention provides a wiring structure of a semiconductor device having a low resistance even when the semiconductor device is microminiaturized, free of electron migration and stress migration, and having a high reliability and a method for manufacturing the same. A semiconductor device having a wiring or a connection plug made of a mixture of a metal and carbon nanotubes berried in a wiring groove or a via hole made in an insulating film on a substrate where a semiconductor chip is fabricated, and its manufacturing method are provided.
    Type: Application
    Filed: December 1, 2003
    Publication date: May 4, 2006
    Applicant: NEC Corporation
    Inventors: Toshitsugu Sakamoto, Hisao Kawaura, Toshio Baba, Fumiyuki Nihey, Yukinori Ochiai, Hiroo Hongo
  • Publication number: 20060057053
    Abstract: By coating the outer surface of carbon nanotubes with various polymers of different properties, such properties as insulation property, reactivity, optical visibility, solvent dispersion property and so on are given to the outer surface of the carbon nanotubes.
    Type: Application
    Filed: May 13, 2003
    Publication date: March 16, 2006
    Applicants: Incorporated Administrative Agency National- Argiculture and Bio-riented Research Organ, NEC Corporation
    Inventors: Kazunori Otobe, Hidenobu Nakao, Hideki Hayashi, Fumiyuki Nihey
  • Publication number: 20050079120
    Abstract: The present invention provides a process for producing a nano-graphite structure having a desired two-dimensional or three-dimensional shape, which process possesses enough potential for ultra-fine processing to allow free selection of the size, shape, and position for the construction therefor; typically a process in which the nano-graphite structure 4 is produced by such a way where a nano-structure amorphous carbon structure 2 formed on a substrate 1 in advance in the shape of a desired ultra-fine steric configuration by a beam-excited reaction is equipped with catalyst metal atoms such as iron contained therein, and when subjecting the steric structure to a low-temperature heat treatment, the structure is converted into the graphite structure 3 through a catalytic thermal reaction by means of the catalyst metal atoms involved therein, while the shape of steric configuration thereof holds.
    Type: Application
    Filed: January 31, 2003
    Publication date: April 14, 2005
    Inventors: Jun-ichi Fujita, Masahiko Ishida, Fumiyuki Nihey, Yukinori Ochiai
  • Publication number: 20040238887
    Abstract: A field-effect transistor has a channel disposed on a substrate, a source electrode connected to a starting end of the channel, a drain electrode connected to a terminal end of the channel, an insulator disposed on an upper or side surface of the channel, and a gate electrode disposed on the upper or side surface of the channel with the insulator interposed therebetween. The channel is made of a plurality of carbon nanotubes.
    Type: Application
    Filed: July 15, 2004
    Publication date: December 2, 2004
    Inventor: Fumiyuki Nihey