Patents by Inventor Fung Leng Chen

Fung Leng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7851899
    Abstract: A BGA package is disclosed including a base IC structure having a base substrate, with an opening running length-wise there through. A first semiconductor chip is mounted face-down on the base substrate so the bond pads thereof are accessible through the opening. The package also includes a secondary IC structure including a secondary substrate, having an opening running there through, and a second semiconductor chip. The second chip is mounted face-down on the secondary substrate so that the bond pads thereof are accessible through the opening in the secondary substrate. An encapsulant fills the opening in the secondary substrate and forms a substantially planar surface over the underside of the secondary substrate. The substantially planar surface is mounted to the first chip of the base IC structure through an adhesive. Wires connect a conductive portion of the secondary IC structure to a conductive portion of the base IC structure.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: December 14, 2010
    Assignees: UTAC - United Test and Assembly Test Center Ltd., Infineon Technologies
    Inventors: Fung Leng Chen, Seong Kwang Brandon Kim, Wee Lim Cha, Yi-Sheng Anthony Sun, Wolfgang Hetzel, Jochen Thomas
  • Patent number: 6768646
    Abstract: An integrated circuit package (30) comprising a substrate (70) having peripheral openings (86) and first and second surfaces (92, 94), a plurality of routing strips (82) being integral with the substrate (70), a plurality of pads (100) centrally disposed on the first surface (92) and electrically connected with at least one of the routing strips (82), a chip (50) having bonding pads (120) adhered to the second surface (84) of the substrate (70), wire bonding (80) electrically connecting at least one bonding pad (120) to at least one of the routing strips (82) and potting material (90) filling the openings (86) to adhere the chip (50) to the substrate (70) and surrounding the wire bonding (80), is disclosed.
    Type: Grant
    Filed: July 14, 1998
    Date of Patent: July 27, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Fung Leng Chen, Chee Kiang Yew, Pang Hup Ong