Abstract: An array substrate, a method of manufacturing an array substrate, a display panel, and an electronic device are provided. The array substrate includes a display area and a peripheral area; the display area includes a pixel region, the pixel region includes a first thin film transistor, and the first thin film transistor includes a first active layer; the peripheral area includes a second thin film transistor, and the second thin film transistor includes a second active layer; and the first active layer includes a material of oxide semiconductor, and the second active layer includes a material of poly-silicon semiconductor.

Abstract: Provided is a digital exposure control method, including: performing exposure of different types of functional areas of a substrate to be exposed through one or a plurality of full-page scans, wherein scan speeds for different types of functional areas of the substrate to be exposed are different.

Abstract: A display device, a pixel compensation circuit and a driving method thereof are disclosed. The pixel compensation circuit includes: a driving transistor, an initialization circuit, a storage circuit, a first data writing circuit, a second data writing circuit, a compensation circuit and a light emitting control circuit. A first terminal of the storage circuit is coupled to the gate electrode of the drive transistor, and the first data writing circuit is configured to write a data signal to a second terminal of the storage circuit. The second data writing circuit is configured to change a potential of the second terminal of the storage circuit so that a potential of the first terminal of the storage circuit is associated with the data signal. The compensation circuit is configured to charge the first terminal of the storage circuit so that it is associated with a threshold voltage of the drive transistor.

Abstract: The present disclosure is related to a thin film transistor. The thin film transistor may include a gate pattern; an active layer pattern; a gate insulating layer between the gate pattern and the active layer pattern; a first conductive pattern including a first pattern part and a first connecting part; a second conductive pattern a second pattern part and a second connecting part; and a first intermediate insulating layer between the first pattern part and the second pattern part. The first conductive pattern and the second conductive pattern may be a source pattern and a drain pattern, respectively. A first through hole may be provided on the first intermediate insulating layer. The second conductive pattern may be connected to the active layer pattern through the second connecting part in the first through hole.

Abstract: A pixel circuit includes a data writing sub-circuit, a light-emitting control sub-circuit and a driving sub-circuit. The data writing sub-circuit is connected to the driving sub-circuit, and is configured to write a data voltage signal into the driving sub-circuit and compensate it, in response to a first gate signal and a second gate signal. The light-emitting control sub-circuit is connected to the driving sub-circuit, and is configured to close a line between a first power supply voltage terminal and a second power supply voltage terminal, in response to a first enable signal and a second enable signal. The driving sub-circuit is configured to provide a driving current to a light-emitting device through the closed line according to the written data voltage signal. Phases of the first enable signal and the first gate signal are opposite, and phases of the second enable signal and the second gate signal are opposite.

Abstract: A shift register unit circuit, a driving method thereof, a scanning drive circuit and a display panel are provided. The shift register unit circuit includes an input sub-circuit configured to set a level at a first node to be an effective level when an input terminal is at an effective level; at least two transmission sub-circuits configured to set a level at a coupled output control node to be an effective level when the first node is at the effective level; and at least two output sub-circuits, each of which is configured to conduct a coupled first clock signal terminal to a coupled output terminal when the coupled output control node is at an effective level.

Abstract: The present disclosure relates to the field of touch display technologies, and provides an array substrate, a manufacturing method thereof, a touch display panel and a touch display device. The array substrate includes a base substrate, and a plurality of thin film transistors, an insulating planarization layer, a plurality of pixel electrodes, a plurality of touch electrodes and a plurality of common electrodes formed sequentially on the base substrate. The insulating planarization layer has a plurality of vias exposing a drain of each thin film transistor respectively. Each pixel electrode is connected to a drain of a corresponding thin film transistor through a via in the insulating planarization layer, and each common electrode is connected to a corresponding touch electrode.

Abstract: Disclosed are a pixel circuit and a driving method thereof, an array substrate and a display device. The pixel circuit includes: a driving circuit, including a control terminal, a first terminal and a second terminal, and configured to control a driving current flowing through the first terminal and the second terminal for driving a light-emitting element to emit light; an input circuit, configured to transmit a reset voltage and a data signal in response to a first scan signal; a reset circuit, configured to apply the reset voltage to the control terminal in response to a second scan signal; a compensation circuit, configured to store the data signal and to electrically connect the control terminal with the second terminal in response to a third scan signal; and a data writing circuit, configured to apply the data signal to the compensation circuit in response to the third scan signal.

Abstract: A display substrate has a main display area and at least one auxiliary display area located beside the main display area. The display substrate includes a plurality of first sub-pixels located in the main display area, and a plurality of second sub-pixels located in each of the at least one auxiliary display area. A distribution density of the plurality of first sub-pixels in the main display area is greater than a distribution density of the plurality of second sub-pixels in each auxiliary display area. Each of the plurality of second sub-pixels includes a pixel driving circuit, and the pixel driving circuit includes at least one vertical thin film transistor. A space exists between every two adjacent pixel driving circuits, and a plurality of spaces constitute a light-transmitting region of the corresponding auxiliary display area.

Abstract: A gate driving sub-circuit, a driving method and a gate driving circuit are provided. The gate driving sub-circuit includes an input signal end, a shift signal output end, an inverted phase shift signal output end, a positive phase shift clock signal input end, an inverted phase shift clock signal input end, a first control clock signal input end, a second control clock signal input end, a first gate driving signal output end, a second gate driving signal output end, a shift register circuit and a control output circuit. The control output circuit includes a first control output sub-circuit and a second control output sub-circuit.

Abstract: A gate driving unit, a gate driving method, a gate driving circuit, a display panel and a display device are provided. The gate driving unit includes a start terminal, a first gate driving signal output terminal, a second gate driving signal output terminal, a pull-up control node control circuit, a pull-up node control circuit, configured to control a potential of a fist pull-up node and a potential of a second pull-up node based on the potential of the pull-up control node, a first gate driving signal output circuit, a second gate driving signal output circuit, and a pull-down node control circuit, configured to control and maintain the potential of the pull-down node under the control of a third clock signal and a fourth clock signal, and control to reset the potential of the pull-down node under the control of the potential of the pull-up control node.

Abstract: The present application discloses a pixel circuit of a display panel. The pixel circuit includes a first latch-control sub-circuit configured to provide a data signal under controls of a first scan signal, a latch sub-circuit including a first inverter having an input terminal coupled to receive the data signal and a second inverter, a second latch-control sub-circuit configured to disconnect the second inverter from the first inverter to form an open circuit under controls of the first scan signal or form a latch loop under controls of a second scan signal to stabilize two voltage levels at the first output terminal of the first inverter and the second output terminal of the second output inverter, and an output sub-circuit configured to switch connection between an output terminal and two reference voltage ports under controls of the two voltage levels alternatively.

Abstract: A transfer printing method and a transfer printing apparatus. The transfer method includes: transferring a plurality of devices formed on an original substrate to a transfer substrate obtaining first position information of positions of the plurality of devices on the transfer substrate; obtaining second position information of corresponding positions, on a target substrate, of devices to be transferred; comparing the first position information with the second position information to obtain first target position information recording a first transfer position; and aligning the transfer substrate with the target substrate and performing a site-designated laser irradiation on at least part of devices on the transfer substrate corresponding to the first transfer position, simultaneously, according to the first target position information, so as to transfer the at least part of the devices from the transfer substrate to the target substrate.

Abstract: The present disclosure provides a shift register unit and a method for driving the same, a gate driving circuit and a method for driving the same, and a display apparatus. The shift register unit includes an input sub-circuit, a discharging control sub-circuit, a discharging sub-circuit, and an output sub-circuit. The input sub-circuit is configured to transmit an input signal at an input signal terminal to a first node under control of a voltage at a second node. The discharging control sub-circuit is configured to transmit a first clock signal at a first clock signal terminal to the second node under control of a voltage at the first node. The discharging sub-circuit is configured to transmit a first constant voltage signal at a first constant voltage signal terminal to an output signal terminal under control of the voltage at the second node.

Abstract: A display device, a pixel compensation circuit and a driving method thereof are disclosed. The pixel compensation circuit includes: a driving transistor, an initialization circuit, a storage circuit, a first data writing circuit, a second data writing circuit, a compensation circuit and a light emitting control circuit. A first terminal of the storage circuit is coupled to the gate electrode of the drive transistor, and the first data writing circuit is configured to write a data signal to a second terminal of the storage circuit. The second data writing circuit is configured to change a potential of the second terminal of the storage circuit so that a potential of the first terminal of the storage circuit is associated with the data signal. The compensation circuit is configured to charge the first terminal of the storage circuit so that it is associated with a threshold voltage of the drive transistor.

Abstract: This disclosure discloses a shift register element, a method for driving the same, a gate driver circuit, and a display device. The shift register element comprises a first input circuit, a second input circuit, a first node control circuit, a second node control circuit, a third node control circuit, and N output circuits, where the first input circuit, the second input circuit, and the first node control circuit are configured to control a first node, the second node control circuit is configured to control a second node so that the third node control circuit controls the third node according to the first node and the second node, and the N output circuits control corresponding output terminals according to corresponding clock signal terminals under the control of the first node.

Abstract: A shift register includes a first transistor, a second transistor, a pull-up node and a switch sub-circuit. A control electrode of the first transistor is connected to a signal input terminal, a first electrode of the first transistor is connected to a first voltage terminal, and a second electrode of the first transistor is connected to a first control node. A control electrode of the second transistor is connected to a reset signal terminal, a first electrode of the second transistor is connected to a second voltage terminal, and a second electrode of the second transistor is connected to the first control node. The switching sub-circuit is connected to the first control node and the pull-up node, and is configured to control a line between the first control node and the pull-up node to be closed and opened.

Abstract: A digital exposure machine and an exposure control method thereof are disclosed. The exposure control method of the digital exposure machine includes: determining a scanning direction of the digital exposure machine, wherein a plurality of sub-pixels in an array include multiple rows of sub-pixels arranged in the scanning direction, the multiple rows of sub-pixels including a first row of sub-pixels in the scanning direction; determining a starting scanning position, the starting scanning position being located on an outer side of the first row of sub-pixels in the scanning direction; and performing a plurality of scannings to expose a display region of the first display substrate to be exposed, wherein a scanning pitch for each of the plurality of scannings is integer times of a pitch of two adjacent rows of sub-pixels of the first display substrate in the scanning direction.

Abstract: A method for blockchain-based data verification is provided. The method includes: obtaining target data submitted by a data submitter, wherein a first data digest of the target data is recorded in a blockchain; computing a second data digest of the target data; determining whether the second data digest matches the first data digest of the target data recorded in the blockchain; and determining that the target data submitted by the data submitter is valid in response to determining that the second data digest matches the first data digest of the target data recorded in the blockchain.

Abstract: Provided is a method for blockchain-based recordkeeping and implementable by a terminal device. The method comprises: obtaining target data; computing a data digest of the target data, and extracting a key segment from the target data; signing, in a secure operation environment included in the terminal device, the data digest and/or the key segment based on a private key associated with the terminal device to generate a signature; and submitting to a blockchain the data digest, the key segment, and the signature, for one or more nodes in the blockchain to verify the signature based on a public key corresponding to the private key, and to record the data digest and the key segment in the blockchain in response to the signature being verified to be valid.