Abstract: An active filter circuit has differential transistors having first conductivity type bipolar transistors and load transistors having second conductivity type bipolar transistors. A connecting node between the differential transistors and the load transistors is driven by a middle electric potential. Voltage dependent characteristics of earth capacitance including parasitic capacitances parasitic to the differential transistors and the load transistors can be kept constant by offsetting the voltage dependent characteristics of the parasitic capacitances. It is thereby possible to make the active filter circuit small in size and the consumed electric power reduced.

Abstract: In a filter circuit of a capacity ground type in which the capacitance connected to output terminals of integrators is grounded, output signals are fed back from multiple stages of integrators to respective input stages of a subtracter which constitute a differential couple with input stages of the first stage integrator, and in the subtracter input signals are subtracted by fed back signals of the multiple stages and are then outputted. It is thereby capable to constitute a high-pass filter in a filter circuit of the capacity ground type with ease.

Abstract: In a signal level control circuit a gain of a current obtained by converting an input signal is controlled by an external control signal in order to automatically control the level of the input signal. The potential of a resistor with a temperature characteristic is set by a voltage determined by the product of an external reference current and an internal resistance so that the temperature characteristic of a current output through the resistor with the temperature characteristic can be removed.

Abstract: A semiconductor apparatus of the present invention comprises, as, for example, shown in FIG. 5, a semiconductor region (32) of first conductivity type formed on a semiconductor substrate (31), and a semiconductor region (34) of second conductivity type formed in the semiconductor region (32) of first conductivity type, in which a first electrode (38a) is formed on the semiconductor region (34) of second conductivity type to form a capacitance through a dielectric layer (37), a second electrode (38c) connected to the semiconductor region (32) of first conductivity type is provided and a third electrode (38b) connected to the semiconductor region (34) of second conductivity type is provided, whereby easiness (capacitor) can be prevented from being affected by a junction capacitance between semiconductor layers of different conductivity types.