Patents by Inventor Futoshi Furuta

Futoshi Furuta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230094287
    Abstract: A hydrogen production apparatus including a photocatalyst and generating hydrogen from water includes a wavelength separation unit separating sunlight by wavelength, an infrared light conversion unit converting infrared light separated by the wavelength separation unit to visible light, and an ultraviolet light conversion unit converting ultraviolet light separated by the wavelength separation unit to visible light.
    Type: Application
    Filed: February 28, 2022
    Publication date: March 30, 2023
    Inventors: Hiromasa TAKAHASHI, Shin YABUUCHI, Naoto FUKATANI, Futoshi FURUTA, Jun HAYAKAWA
  • Publication number: 20180121569
    Abstract: A customer's request is more appropriately reflected in the design. A method of processing a request for designing a device receives a required specification for a device from a user input and output device, searches a case similar to the required specification in the old case specification information, outputs the case similar to the required specification found in the old case specification information to the user input and output device, and calculates a specification of a design result of the device according to the required specification for an unauthorized input for the similar case from the user input and output device, or transmits a request for designing the device according to the required specification to an external design system, and outputs the design result of the device calculated or received from the design system to the user input and output device.
    Type: Application
    Filed: October 17, 2017
    Publication date: May 3, 2018
    Inventors: Futoshi FURUTA, Nobuyuki SUGII, Daisuke RYUZAKI
  • Patent number: 9087822
    Abstract: To provide a semiconductor device having a high efficiency of arranging a TSV, there is provided a semiconductor device which is stacked with a semiconductor chip, and in which the semiconductor chips contiguous each other are electrically connected by plural TSVs, the semiconductor chip includes a core circuit and plural IO circuits arranged at a surrounding thereof, the TSV is arranged in the core circuit, and a pitch of arranging the TSVs is an integer-fold of a cell pitch of a library configuring the core circuit.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: July 21, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Futoshi Furuta, Kenichi Osada
  • Patent number: 8908345
    Abstract: In a stacked chip system, an IO circuit connected to a TSV pad for IO and a switch circuit constitute an IO channel in each chip, the IO channels as many as the maximum scheduled number of stacks are coupled together and connected to constitute an IO group, and the chip has one or more such IO groups. Each TSV pad for IO is connected with a through via to an IO terminal at the same position in a chip of another layer. On an interposer, if the actual number of stacks is less than the maximum scheduled number of stacks, connection pads for IO in adjacent IO groups on the interposer are connected via a conductor.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: December 9, 2014
    Assignee: Hitachi,Ltd.
    Inventors: Futoshi Furuta, Kenichi Osada
  • Publication number: 20140091478
    Abstract: To provide a semiconductor device having a high efficiency of arranging a TSV, there is provided a semiconductor device which is stacked with a semiconductor chip, and in which the semiconductor chips contiguous each other are electrically connected by plural TSVs, the semiconductor chip includes a core circuit and plural IO circuits arranged at a surrounding thereof, the TSV is arranged in the core circuit, and a pitch of arranging the TSVs is an integer-told of a ceil pitch of a library configuring the core circuit.
    Type: Application
    Filed: October 1, 2013
    Publication date: April 3, 2014
    Inventors: Futoshi Furuta, Kenichi Osada
  • Patent number: 8493307
    Abstract: To realize a random number generating circuit that is optimum for a liquid crystal display device that is used in a terminal device that includes a display/input component. A liquid crystal display device includes a liquid crystal display panel, a control circuit and a random number generating circuit, the random number generating circuit comprises plural shift registers, an output circuit and a register that stores an initial value, and the random number generating circuit is equipped with plural initial values, whereby the randomness of the random numbers is improved. Further, it becomes possible to increase and output frequencies by the output circuit because it is possible to output respectively different random numbers from the plural shift registers.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: July 23, 2013
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Noboru Kataoka, Fumiaki Komori, Takashi Watanabe, Futoshi Furuta, Hiroshi Kageyama
  • Patent number: 8380124
    Abstract: A communication system by electrostatic coupling and electromagnetic induction includes: a first transmission part (3a) and a first reception part (3b) which exchange data therebetween through non-contact communication using electrostatic coupling; a second transmission part (4a) and a second reception part (4b) which exchange data therebetween through non-contact communication using electromagnetic induction; and an image display device (8) which displays an image based on the data thus received. With this configuration, it is possible to make communication performed by the first transmission part (3a) and the first reception part (3b) communication with higher speed, larger volume, and higher reliability.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: February 19, 2013
    Assignees: Hitachi, Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Ken Takei, Futoshi Furuta, Hiroshi Kageyama
  • Patent number: 8253227
    Abstract: A semiconductor integrated circuit device capable of achieving improvement of I/O processing performance, reduction of power consumption, and reduction of cost is provided. Provided is a semiconductor integrated circuit device including, for example, a plurality of semiconductor chips stacked and mounted, the chips having data transceiving terminals bus-connected via through-vias, and data transmission and reception are performed via the bus with using the lowest source voltage among source voltages of internal core circuits of the chips. In accordance with that, a source voltage terminal of an n-th chip to be at the lowest source voltage is connected with source voltage terminals for data transceiving circuits of the other semiconductor chips via through-vias.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: August 28, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Osada, Makoto Saen, Futoshi Furuta
  • Patent number: 8233105
    Abstract: In order to restrain increase in frame area caused along with a larger number of channels to a minimum, there is provided an image display device that adopts a communication method in which a signal is transmitted/received with the use of electrostatic capacitance coupling. A first board includes: a tabular first power supply line, a tabular second power supply line, a semiconductor element, and a tabular first electrode group. A second board includes: a tabular second electrode group and a tabular common electrode. In a state where the first board and the second board are laid on each other, the first electrode group overlaps the second electrode group while one of the first power supply line and the second power supply line overlaps the common electrode.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: July 31, 2012
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Hiroshi Kageyama, Futoshi Furuta, Ken Takei
  • Publication number: 20120162836
    Abstract: In a stacked chip system, an IO circuit connected to a TSV pad for IO and a switch circuit constitute an IO channel in each chip, the IO channels as many as the maximum scheduled number of stacks are coupled together and connected to constitute an IO group, and the chip has one or more such IO groups. Each TSV pad for IO is connected with a through via to an IO terminal at the same position in a chip of another layer. On an interposer, if the actual number of stacks is less than the maximum scheduled number of stacks, connection pads for IO in adjacent IO groups on the interposer are connected via a conductor.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 28, 2012
    Inventors: Futoshi FURUTA, Kenichi Osada
  • Patent number: 8184252
    Abstract: An image display device includes a display panel having plural pixels and a second board having a transmitting electrode, the display panel having a first substrate that is disposed so as to overlap the second board, each pixel having a pixel electrode and a counter electrode, and the counter electrode being formed in a planar shape and being commonly provided to the pixel electrodes of each pixel; the counter electrode being divided into a portion A corresponding to the transmitting electrode of the second board and a portion B other than it, and the portions A and B of the counter electrode being connected to a common voltage through resistors. The portion A of the counter electrode constitutes the receiving electrode, and the portion A of the counter electrode acting as the receiving electrode is connected to a receiving circuit in the display panel through a decoupling capacitor.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: May 22, 2012
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Futoshi Furuta, Hiroshi Kageyama, Ken Takei
  • Patent number: 8148814
    Abstract: In a through-via-hole path of semiconductor chips stacked in N stages, repeater circuits are provided in the respective semiconductor chips. For example, a signal transmitted from an output buffer circuit of the semiconductor chip is transmitted to an input buffer circuit of the semiconductor chip via the repeater circuits of the respective semiconductor chips. The respective repeater circuits can isolate impedances on input sides and output sides, and therefore, a deterioration of a waveform quality accompanied by a parasitic capacitance parasitic on the through-via-hole path of the respective semiconductor chips can be reduced and a high speed signal can be transmitted.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: April 3, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Futoshi Furuta, Kenichi Osada, Makoto Saen
  • Publication number: 20100200998
    Abstract: In a through-via-hole path of semiconductor chips stacked in N stages, repeater circuits are provided in the respective semiconductor chips. For example, a signal transmitted from an output buffer circuit of the semiconductor chip is transmitted to an input buffer circuit of the semiconductor chip via the repeater circuits of the respective semiconductor chips. The respective repeater circuits can isolate impedances on input sides and output sides, and therefore, a deterioration of a waveform quality accompanied by a parasitic capacitance parasitic on the through-via-hole path of the respective semiconductor chips can be reduced and a high speed signal can be transmitted.
    Type: Application
    Filed: February 2, 2010
    Publication date: August 12, 2010
    Inventors: Futoshi FURUTA, Kenichi Osada, Makoto Saen
  • Publication number: 20100109096
    Abstract: A semiconductor integrated circuit device capable of achieving improvement of I/O processing performance, reduction of power consumption, and reduction of cost is provided. Provided is a semiconductor integrated circuit device including, for example, a plurality of semiconductor chips stacked and mounted, the chips having data transceiving terminals bus-connected via through-vias, and data transmission and reception are performed via the bus with using the lowest source voltage among source voltages of internal core circuits of the chips. In accordance with that, a source voltage terminal of an n-th chip to be at the lowest source voltage is connected with source voltage terminals for data transceiving circuits of the other semiconductor chips via through-vias.
    Type: Application
    Filed: October 27, 2009
    Publication date: May 6, 2010
    Inventors: Kenichi Osada, Makoto Saen, Futoshi Furuta
  • Publication number: 20100026950
    Abstract: An image display device includes a display panel having plural pixels and a second board having a transmitting electrode, the display panel having a first substrate that is disposed so as to overlap the second board, each pixel having a pixel electrode and a counter electrode, and the counter electrode being formed in a planar shape and being commonly provided to the pixel electrodes of each pixel; the counter electrode being divided into a portion A corresponding to the transmitting electrode of the second board and a portion B other than it, and the portions A and B of the counter electrode being connected to a common voltage through resistors. The portion A of the counter electrode constitutes the receiving electrode, and the portion A of the counter electrode acting as the receiving electrode is connected to a receiving circuit in the display panel through a decoupling capacitor.
    Type: Application
    Filed: July 27, 2009
    Publication date: February 4, 2010
    Inventors: Futoshi FURUTA, Hiroshi Kageyama, Ken Takei
  • Publication number: 20090251453
    Abstract: In order to restrain increase in frame area caused along with a larger number of channels to a minimum, there is provided an image display device that adopts a communication method in which a signal is transmitted/received with the use of electrostatic capacitance coupling. A first board includes: a tabular first power supply line, a tabular second power supply line, a semiconductor element, and a tabular first electrode group. A second board includes: a tabular second electrode group and a tabular common electrode. In a state where the first board and the second board are laid on each other, the first electrode group overlaps the second electrode group while one of the first power supply line and the second power supply line overlaps the common electrode.
    Type: Application
    Filed: April 3, 2009
    Publication date: October 8, 2009
    Inventors: Hiroshi Kageyama, Futoshi Furuta, Ken Takei
  • Publication number: 20090197529
    Abstract: A communication system by electrostatic coupling and electromagnetic induction includes: a first transmission part (3a) and a first reception part (3b) which exchange data therebetween through non-contact communication using electrostatic coupling; a second transmission part (4a) and a second reception part (4b) which exchange data therebetween through non-contact communication using electromagnetic induction; and an image display device (8) which displays an image based on the data thus received. With this configuration, it is possible to make communication performed by the first transmission part (3a) and the first reception part (3b) communication with higher speed, larger volume, and higher reliability.
    Type: Application
    Filed: January 22, 2009
    Publication date: August 6, 2009
    Inventors: Ken Takei, Futoshi Furuta, Hiroshi Kageyama
  • Publication number: 20090184950
    Abstract: Provided is a capacitor coupling type power transmission circuit in which a variation in receiving side voltage due to a variation in capacitance is suppressed to prevent an influence on a variation in load current in a display panel. An insulating board of the display panel is sandwiched by capacitive coupling electrodes formed on each of a transmitting side board and a board of the display panel, thereby forming capacitors. A non-contact transmission is performed by the capacitors. An alternating current voltage signal obtained by electrodes on a display panel side is rectified by a rectifier including diodes. A constant voltage circuit which is a shunt regulator including a diode array in which a resistor and a plurality of diodes are connected in series is provided to maintain a stabilized voltage irrespective of a variation in load in the display panel.
    Type: Application
    Filed: January 21, 2009
    Publication date: July 23, 2009
    Inventors: Futoshi Furuta, Hiroshi Kageyama, Ken Takei
  • Publication number: 20090160829
    Abstract: To realize a random number generating circuit that is optimum for a liquid crystal display device that is used in a terminal device that includes a display/input component. A liquid crystal display device includes a liquid crystal display panel, a control circuit and a random number generating circuit, the random number generating circuit comprises plural shift registers, an output circuit and a register that stores an initial value, and the random number generating circuit is equipped with plural initial values, whereby the randomness of the random numbers is improved. Further, it becomes possible to increase and output frequencies by the output circuit because it is possible to output respectively different random numbers from the plural shift registers.
    Type: Application
    Filed: December 17, 2008
    Publication date: June 25, 2009
    Inventors: Noboru Kataoka, Fumiaki Komori, Takashi Watanabe, Futoshi Furuta, Hiroshi Kageyama
  • Publication number: 20090153445
    Abstract: A capacitive coupling-type transmitting and receiving circuit for information signal is provided in which attenuation of a signal on a non-contact transmission path via a capacitor and a change of voltage on the receiving side due to a slight change in capacitance are suppressed, modulation and demodulation processes of signals are unnecessary, and non-contact transmission which does not depend on the transmission rate is enabled. The capacitor is formed with a transmitting electrode on a transmission board and a receiving electrode on a display panel board, and an insulating member is interposed between the electrodes. The transmitting board comprises a transmission signal processing circuit which converts display data from an external signal source into a voltage signal. The display panel board comprises an impedance converter circuit and a reception signal processing circuit.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 18, 2009
    Inventors: Futoshi Furuta, Hiroshi Kageyama, Ken Takei