Patents by Inventor Futoshi Tokunou

Futoshi Tokunou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5428229
    Abstract: A MOS semiconductor device which exhibits high switching operations including high turn-on and an excellent self-cooling capability. The device prevents damage to insulation films and electrodes thereof. An IGT includes a multi-layer structure having a p type emitter layer, an n type base layer, a p type base layer and an n type emitter layer superimposed therein. A gate electrode and an overlying gate oxide film are disposed on a recessed surface of the multi-layer structure. A cathode electrode is located only in and around a cathode surface so that most of the top surface of the gate electrode is uncovered. Via an intervening cathode distortion snubbering plate, the cathode electrode is in pressure contact with a cathode electrode body. The gate and the cathode electrodes have a reduced capacitance therebetween. The cathode electrode body serves to cool the cathode electrode. The gate electrode and the gate oxide film are protected from stress, and hence, will not be damaged by stress.
    Type: Grant
    Filed: October 18, 1994
    Date of Patent: June 27, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuhiko Niwayama, Futoshi Tokunou