Abstract: Topical formulation containing pregabalin for long-term analgesic activity. The composition is prepared using high pressure homogenization, which changes the structure of the composition. The analgesic effect of the compounds of the present invention is significantly increased compared to reference formulations homogenized with equipment of the same quantitative composition but less shearing forces.

Abstract: The present invention relates to a topical pharmaceutical composition comprising pregabalin and a reduced micellar phospholipid as an active ingredient, which results in a prolonged analgesic effect of pregabalin. The product can reduce neuropathic pain by at least 5 hours.

Abstract: Topical formulation containing pregabalin for long-term analgesic activity. The composition is prepared using high shear mixers or homogenizers such as HPH or ultrasonic devices, which changes the structure of the composition. The analgesic effect of the compounds of the present invention is significantly increased compared to reference formulations homogenized with equipment of the same quantitative composition but less shearing forces.

Abstract: The present invention relates to a topical pharmaceutical composition comprising pregabalin and a reduced micellar phospholipid as an active ingredient, which results in a prolonged analgesic effect of pregabalin. The product can reduce neuropathic pain by at least 5 hours.

Abstract: A data processing system includes interconnect circuitry providing a plurality of memory transaction paths between one or more transaction masters, including a processor, debugging circuitry and a DMA unit, and one or more transaction slaves including a non-volatile memory, a DRAM memory and an I/O interface. A cache memory is provided between the interconnect circuitry and the non-volatile memory. This cache memory may be a two way set associative cache memory. The cache memory may serve as a read-only cache memory. A cache miss will result in a line fill of a cache line including the target data which was missed. If prefetching is enabled for the cache memory and the transaction was attempting to read a program instruction, then a prefetch operation may be performed in which a further contiguous cache line of data is also fetched into the cache memory upon the cache miss.

Abstract: A data processing system 2 includes interconnect circuitry 10 providing a plurality of memory transaction paths between one or more transaction masters, including a processor 4, debugging circuitry 6 and a DMA unit 8, and one or more transaction slaves including a non-volatile memory 12, a DRAM memory 18 and an I/O interface 20. A cache memory 26 is provided between the interconnect circuitry 10 and the non-volatile memory 12. This cache memory 26 may be a two way set associative cache memory. The cache memory 26 may serve as a read-only cache memory. A cache miss will result in a line fill of a cache line including the target data which was missed. If prefetching is enabled for the cache memory 26 and the transaction was attempting to read a program instruction, then a prefetch operation may be performed in which a further contiguous cache line of data is also fetched into the cache memory 26 upon the cache miss.