Abstract: An electrical switch comprising a touch panel includes a flexible membrane having a series of parallel, electrically conductive strips formed thereon; and an opposed substrate layer having conductive strips thereon parallel and orthogonal to the membrane strips. A series of filament spacers, running parallel to the substrate layer strips, are positioned between the membrane and substrate layer to maintain the membrane strips and substrate strips in spaced-apart relation to each other. The filament spacers are secured to an associated boundary or frame. Finger or instrument pressure selectively applied to the membrane and directed toward the substrate, can establish contact between a chosen membrane strip and substrate strip to close the switch. The elastic deformation of the filament spacers enhances contact closure and contact life expectancy. The presence of insulative dust, which interferes with the current flow between the contacts, is eliminated.

Abstract: A bubble memory chip is manufactured using the following processing steps:a first dielectric insulation layer is deposited on the epitaxial garnet substrate, next,a comparatively thicker layer of a second dielectric insulator is deposited on the surface of the first layer of dielectric insulation, next,the reverse of the desired conductor image is printed on the surface of the second layer of dielectric insulator using a resist material such as a photoresist, next,a straight wall etching process is used to achieve a straight wall etching of the second layer of dielectric insulation but not affecting the first layer of dielectric insulation, next,the selected conductor material is deposited into the exposed groove from the previous etching process and over any remaining resist material such as a photoresist, next,a resist material is applied over the resulting conducting surface from the previous step, next,a course featured pattern is printed over the desired conductor regions leaving exposed the extensive su

Abstract: In a field access type bubble memory system using a major loop minor loop organization, additional redundant minor loops are included in each memory device so that defective minor loops may be disregarded and the memory retain its nominal capacity. Thus, the total number of minor loops is in excess of the nominal capacity. A stationary register is formed integrally with the major loop by coupling bubble idlers directly to the major loop bubble propagation path. The stationary register has as many register positions as the total number of minor loops coupled to the major loop. An appropriate binary code identifies in the appropriate register location the corresponding minor loop which is defective, including nominally defective minor loops, if necessary, so that a number of minor loops equal to the nominal capacity of the memory are identified as good.

Abstract: A noncirculating register for bubble memory systems is comprised of a propagation track, or shift register, which allows the transmission of bubbles in a serial path, a plurality of bubble idlers formed in an array parallel and adjacent to the propagation track and coupled thereto and a single current conductor arranged in such a fashion that there is a loop formed in the vicinity of each idler location, said loop extending into the propagation track which contains the normal straight line path of the conductor. By properly current pulsing the conductor loop in proper relationship to the rotating in-plane magnetic field, bubbles may be transferred in, transferred out, replicated out or annihilated in the various idler locations with respect to the contents of the propagation track. Without a current pulse, the contents of the idler locations and the propagation track have no effect on one another.

Abstract: In a magnetic bubble memory device, an improvement to the means for providing an in-plane rotational magnetic field to advance bubbles through some appropriate, staged structural form of permalloy elements is a conductor overlay positioned so that the permalloy elements are generally oriented normally to current flow in the conductors. The conductor overlay may consist of two orthogonal groups of parallel wires or a single grid or mesh of wires with four electrical connections, one on each of four edges. The conductor overlay may be driven to produce an in-plane rotating magnetic field and the magnetic bubbles travel to or follow the induced poles in the permalloy elements just as if conventionally driven.

Abstract: A bubble memory package is comprised of a nonmagnetizable heat sink formed with a pocket for receiving the field coil and magnetic chip carrier assemblies. The heat sink is massive and capable of dissipating the heat generated by a high density memory operating at a high frequency. The heat sink is not closed over the top of the coil and memory carrier assemblies to reduce eddy and circulating electrical currents formed in an electrically conductive heat sink. The heat sink is formed with a track guide for receiving a heat sink plate which may be of electrically nonconductive material but which has sufficient heat conductivity to assist in transferring heat into the heat sink. The top of the heat sink plate is formed with a pocket for receiving a permanent magnet to generate the bias field and the bottom of the heat sink is formed with a second pocket for receiving a magnet assembly. The entire package is surrounded by a magnetic shield container.

Abstract: In a field access type bubble memory system using a major loop-minor loop organization, additional redundant minor loops are included in each memory chip so that defective minor loops may be discarded and the memory retain its nominal capacity. Thus, the total number of minor loops is in excess of the nominal capacity. A stationary register is placed adjacent to and parallel to a major loop and has as many register positions as the total number of minor loops on the chip. An appropriate binary code identifies in the appropriate register location the corresponding minor loop which is defective, including nominally defective minor loops, if necessary, so that a number of minor loops equal to the nominal capacity of the memory are identified as good. Each time the memory is accessed, the contents of the register are accessed, nondestructively, and read into and merged with the contents of the major loop on an every other one basis.