Abstract: A photovoltaic system features at least one photovoltaic module, a substructure for accommodating the at least one photovoltaic module, a first supporting element and a second supporting element can be at least partially pushed one into another such that at least two guide elements on a first supporting element engage in the second supporting element. One of the supporting elements is arranged on the rear side of the photovoltaic module and the other supporting element is arranged on the substructure.

Abstract: The present invention provides a manufacturing method for forming an integrated circuit device and to a corresponding integrated circuit device. The manufacturing method for forming an integrated circuit device comprises the steps of: forming a first level on a substrate; forming a second level above the first level; forming a cap layer on the second level which covers a first region of the level and leaves a second region uncovered; and simultaneously etching a first contact hole in the first region and a second contact hole in the second region such that the etching is selective to the cap layer in the second region and proceeds to a greater depth in the first region.

Abstract: The present invention provides a manufacturing method for forming an integrated circuit device and to a corresponding integrated circuit device. The manufacturing method for forming an integrated circuit device comprises the steps of: forming a first level on a substrate; forming a second level above the first level; forming a cap layer on the second level which covers a first region of the level and leaves a second region uncovered; and simultaneously etching a first contact hole in the first region and a second contact hole in the second region such that the etching is selective to the cap layer in the second region and proceeds to a greater depth in the first region.

Abstract: A method for characterizing and simulating a CMP process, in which a substrate to be polished, in particular a semiconductor wafer, is pressed onto a polishing cloth and is rotated relative to the latter for a defined polishing time. The method includes defining a set of process parameters, in particular a compressive force and a relative rotational speed between a substrate and polishing cloth; preparing and characterizing a test substrate having test patterns with different structure densities using the defined process parameters; determining a set of model parameters for simulating the CMP process from results of the characterization of the test substrate; determining layout parameters of the substrate which is to be polished; defining a profile of demands for a CMP process result for the substrate to be polished; and simulating the CMP process in order to determine the polishing time required to satisfy the profile of demands.

Abstract: An apparatus for polishing wafers includes a polishing table with a heating device. A conduit connects a tank holding a liquid polishing agent to a distributor for feeding the liquid polishing agent to the polishing table. A heat exchanger is disposed along the conduit between the tank and the distributor for heating the liquid polishing agent. The heat exchanger is independent of said heating device. A method for heating a polishing agent is also provided.

Abstract: The polishing device grinds or polishes semiconductor substrates. The device includes a polishing table, into which a measuring device is integrated and a through opening. A polishing cloth covers the polishing table. The polishing cloth has at least one opening formed therein which corresponds to the through opening in the polishing table. The invention also relates to a polishing cloth for use in the polishing device.