Abstract: A display device includes: pixels; gate lines for connecting to the pixels; a first gate driving block for connecting to first and second gate lines that are adjacent to each other; and a second gate driving block for connecting to the first gate line and the second gate line, wherein the first gate driving block includes: a first gate signal generating portion; a first transistor connected between a first output terminal of the first gate signal generating portion and the first gate line; and a second transistor connected between the first output terminal and the second gate line, wherein the second gate driving block includes: a second gate signal generating portion; a third transistor connected between a second output terminal of the second gate signal generating portion and the first gate line; and a fourth transistor connected between the second output terminal and the second gate line.

Abstract: A display panel driving control circuit includes a configuration channel configured to determine whether a reversible connector not having designated up and down sides is connected in a first connection state or in a second connection state, and to generate a selection signal based on the determination, and a timing control circuit configured to receive image data in the first connection state and image data in the second connection state based on the selection signal, to process the received image data in the first connection state and the received image data in the second connection state, and to generate a data signal based on the processing.

Abstract: A timing controller resetting circuit including: a resistor connected to an output node from which a reset signal is output and a first voltage source which supplies a first voltage; a capacitor connected to the output node and a second voltage source which supplies a second voltage that is lower than the first voltage; a reference voltage source configured to generate a reference voltage that is lower than the first voltage and higher than the second voltage; a comparator including a first input terminal which receives the first voltage, a second input terminal which receives the reference voltage, and an output terminal which outputs a comparison result signal generated by comparing the first voltage with the reference voltage; and a transistor including a first terminal which is connected to the output node, a second terminal which receives the second voltage, and a gate terminal which receives the comparison result signal.

Abstract: A display device includes: pixels; gate lines for connecting to the pixels; a first gate driving block for connecting to first and second gate lines that are adjacent to each other; and a second gate driving block for connecting to the first gate line and the second gate line, wherein the first gate driving block includes: a first gate signal generating portion; a first transistor connected between a first output terminal of the first gate signal generating portion and the first gate line; and a second transistor connected between the first output terminal and the second gate line, wherein the second gate driving block includes: a second gate signal generating portion; a third transistor connected between a second output terminal of the second gate signal generating portion and the first gate line; and a fourth transistor connected between the second output terminal and the second gate line.

Abstract: A command input method includes: converting an original pixel data into command embedded pixel data based on a command to control a device, the command being embedded in the command embedded pixel data; transmitting the command embedded pixel data from a host to the device; extracting the command from the command embedded pixel data; and controlling the device according to the extracted command.

Abstract: A method of driving a display apparatus includes determining a duration of a blank interval between a first frame and a second frame, wherein the second frame is subsequent to the first frame, and modulating a common voltage during the blank interval when the duration is longer than a first reference time, wherein an average of the common voltage is fixed during the blank interval.

Abstract: A data driver includes a receiver, a transition minimization coding (“TMC”) decoder, a dithering adder and a voltage generator. The receiver receives a clock signal and first image data which is generating by removing a dithering from a dithered original image data and performing a TMC. The TMC decoder removes the TMC from the first image data to generate second image data. The dithering adder restores the removed dithering based on the clock signal and the second image data to generate third image data. The voltage generator generates a plurality of data voltages based on the third image data.

Abstract: A display device includes: a timing controller which receives image data including high logics and low logics from the outside; a data driver which generates a data signal, based on the image data; and pixels which emit light with a luminance corresponding to the data signal, where the data driver determines an error of the image data, based on a checksum included in the image data.

Abstract: A display device includes: pixels; gate lines for connecting to the pixels; a first gate driving block for connecting to first and second gate lines that are adjacent to each other; and a second gate driving block for connecting to the first gate line and the second gate line, wherein the first gate driving block includes: a first gate signal generating portion; a first transistor connected between a first output terminal of the first gate signal generating portion and the first gate line; and a second transistor connected between the first output terminal and the second gate line, wherein the second gate driving block includes: a second gate signal generating portion; a third transistor connected between a second output terminal of the second gate signal generating portion and the first gate line; and a fourth transistor connected between the second output terminal and the second gate line.

Abstract: A method of driving a display apparatus includes determining a duration of a blank interval between a first frame and a second frame, wherein the second frame is subsequent to the first frame, and modulating a common voltage during the blank interval when the duration is longer than a first reference time, wherein an average of the common voltage is fixed during the blank interval.

Abstract: A data driver includes a receiver, a transition minimization coding (“TMC”) decoder, a dithering adder and a voltage generator. The receiver receives a clock signal and first image data which is generating by removing a dithering from a dithered original image data and performing a TMC. The TMC decoder removes the TMC from the first image data to generate second image data. The dithering adder restores the removed dithering based on the clock signal and the second image data to generate third image data. The voltage generator generates a plurality of data voltages based on the third image data.

Abstract: A display device is provided including a timing controller configured to output a test image signal, a data driver configured to output a plurality of data voltages corresponding to the test image signal; and a display panel configured to display a test image corresponding to the data voltages, wherein the timing controller includes a first processor configured to output the test image signal in response to a test signal, and a second processor configured to receive luminance information of the test image, correct a predetermined reference gamma voltage corresponding to the test image with reference to the received luminance information, and output the test signal, which corresponds to the reference gamma voltage, to the first processor.

Abstract: A command input method includes: converting an original pixel data into command embedded pixel data based on a command to control a device, the command being embedded in the command embedded pixel data; transmitting the command embedded pixel data from a host to the device; extracting the command from the command embedded pixel data; and controlling the device according to the extracted command.

Abstract: A display device is provided including a timing controller configured to output a test image signal, a data driver configured to output a plurality of data voltages corresponding to the test image signal; and a display panel configured to display a test image corresponding to the data voltages, wherein the timing controller includes a first processor configured to output the test image signal in response to a test signal, and a second processor configured to receive luminance information of the test image, correct a predetermined reference gamma voltage corresponding to the test image with reference to the received luminance information, and output the test signal, which corresponds to the reference gamma voltage, to the first processor.

Abstract: A method of driving a display panel includes compensating first pixel data corresponding to a first pixel of a plurality of pixels in the display panel based on at least one of a first decision, a second decision, or a third decision and generating a first data voltage corresponding to the compensated first pixel data. The first data voltage is applied to the first pixel through a data line. The first decision includes determining, based on a position of the first pixel, whether compensation for the first pixel data is required. The second decision includes determining, based on previous subpixel data and present subpixel data for the first pixel, whether the compensation for the first pixel data is required. The third decision includes determining whether the first pixel data complies with a compensation avoidance condition.

Abstract: A method of driving a display panel includes: applying a data signal to the display panel during a sub-active interval based on a data enable signal, and blocking the data signal applied to the display panel during the sub-blanking interval. In such an embodiment, the data enable signal is activated during the sub-active interval and deactivated during the sub-blanking interval, a frame is divided into a plurality of sub-frames, and each of the sub-frames is divided into the sub-active interval and the sub-blanking interval.

Abstract: A display apparatus includes a display panel which displays an image at a first driving frequency in a normal mode or at a second driving frequency less than the first driving frequency in a low-voltage mode; a data driver which provides a data voltage to the display panel; a gate driver which sequentially applies gate signals to the display panel in response to a first gate control signal or a second gate control signal; and a timing controller which provides the first gate control signal to the gate driver in the normal mode, and provides the second gate control signal to the gate driver in the low-voltage mode, where the second gate control signal has a frequency less than the first gate control signal and has a high period having a length substantially equal to a length of a high period of the first gate control signal.