Abstract: An autonomous system for x-by-wire control includes processing nodes distributed and connected to one another. Sensors are connected to the processing nodes. Actuators are configured to directly control the autonomous system driven by and connected to the processing nodes for x-by-wire control. The processing nodes are configured to: partition and map processing tasks between the processing nodes, and merge and reduce results of individual processing tasks into an actionable table that specifies objectives for the autonomous system.

Abstract: A blockchain of transactions may be referenced for various purposes and may be later accessed by interested parties for ledger verification. One example operation may comprise one or more of identifying an updated software build, creating a hash based on the updated software build, storing the hash of the updated software build in a blockchain, and storing a binary representation of the updated software build in a distributed hash table (DHT).

Abstract: A virtual blockchain configuration may provide a distributed structure that uses a distributed hash configuration to reduce the complexity of blockchain transactions. One example method of operation may comprise one or more of storing a subset of blockchain data in a network device, accessing via the network device a virtual copy of a blockchain, accessing a blockchain block via the virtual copy of the blockchain, and writing blockchain transactions to the blockchain block via the network device.

Abstract: An autonomous system for x-by-wire control includes processing nodes distributed and connected to one another. Sensors are connected to the processing nodes. Actuators are configured to directly control the autonomous system driven by and connected to the processing nodes for x-by-wire control. The processing nodes are configured to: partition and map processing tasks between the processing nodes, and merge and reduce results of individual processing tasks into an actionable table that specifies objectives for the autonomous system.

Abstract: A method for automated error detection and verification of software comprises providing a model of the software, the model including one or more model inputs and one or more model outputs, and a plurality of blocks embedded within the model each with an associated block type, the block types each having a plurality of associated block-level requirements. The method further comprises topologically propagating from the model inputs, a range of signal values or variable values, and error bounds, across computational semantics of all the blocks to the model outputs. Each behavior pivot value for a given block is identified and examined to determine if modifying or extending the propagated range by the error bound will or may cause a signal value to fall on either side of the behavioral pivot value. All occurrences of the signal value that will or may fall on either side of the behavioral pivot value are reported.

Abstract: Systems and methods for verifying model equivalence are provided. In one implementation, a system includes: a memory device that stores a reference model (RM) and comparison model (CM), wherein the CM and the RM are constrained by a set of rules; and a processing unit that generates a reference model representation (RMR) from the RM and stores the RMR on the memory device; the processing unit further generates a comparison model representation (CMR) from the comparison model (CM) and stores the CMR on the memory device, wherein the processing unit further to: verifies that the CMR compatibly implements the RMR; verifies that a CM data flow diagram derived from the CMR compatibly implements a RM data flow diagram derived from the RMR; and verifies that every CM semantic unit implements a behavior that corresponds to a RM semantic unit and every RM semantic unit is accounted for in the CM.

Abstract: A system for verifying that a comparison model having folded expressions matches a reference model includes at least one memory device that stores a reference model and a comparison model, wherein the comparison model was previously generated based on the reference model. The reference model adheres to a first set of syntax and semantics, wherein the reference model includes a plurality of first expressions, each of the first expressions including a first operator and a first operand. The comparison model adheres to a second set of syntax and semantics, wherein the comparison model includes a second expression, the second expression including a second operator and a second operand. The system further includes a processing unit configured to match the second expression with the plurality of first expressions.

Abstract: Embodiments of the present subject matter can enable the analysis of signal value errors for system models. In an example, signal value errors can be propagated through the functional blocks of a system model to analyze possible effects as the signal value errors impact incident functional blocks. This propagation of the errors can be applicable to many models of computation including avionics models, synchronous data flow, and Kahn process networks.

Abstract: A system for verifying that a comparison model having folded expressions matches a reference model includes at least one memory device that stores a reference model and a comparison model, wherein the comparison model was previously generated based on the reference model. The reference model adheres to a first set of syntax and semantics, wherein the reference model includes a plurality of first expressions, each of the first expressions including a first operator and a first operand. The comparison model adheres to a second set of syntax and semantics, wherein the comparison model includes a second expression, the second expression including a second operator and a second operand. The system further includes a processing unit configured to match the second expression with the plurality of first expressions.

Abstract: Systems and methods for verifying model equivalence are provided. In one implementation, a system includes: a memory device that stores a reference model (RM) and comparison model (CM), wherein the CM and the RM are constrained by a set of rules; and a processing unit that generates a reference model representation (RMR) from the RM and stores the RMR on the memory device; the processing unit further generates a comparison model representation (CMR) from the comparison model (CM) and stores the CMR on the memory device, wherein the processing unit further to: verifies that the CMR compatibly implements the RMR; verifies that a CM data flow diagram derived from the CMR compatibly implements a RM data flow diagram derived from the RMR; and verifies that every CM semantic unit implements a behavior that corresponds to a RM semantic unit and every RM semantic unit is accounted for in the CM.

Abstract: Embodiments of the present subject matter can enable the analysis of signal value errors for system models. In an example, signal value errors can be propagated through the functional blocks of a system model to analyze possible effects as the signal value errors impact incident functional blocks. This propagation of the errors can be applicable to many models of computation including avionics models, synchronous data flow, and Kahn process networks.

Abstract: A method for automated error detection and verification of software comprises providing a model of the software, the model including one or more model inputs and one or more model outputs, and a plurality of blocks embedded within the model each with an associated block type, the block types each having a plurality of associated block-level requirements. The method further comprises topologically propagating from the model inputs, a range of signal values or variable values, and error bounds, across computational semantics of all the blocks to the model outputs. Each behavior pivot value for a given block is identified and examined to determine if modifying or extending the propagated range by the error bound will or may cause a signal value to fall on either side of the behavioral pivot value. All occurrences of the signal value that will or may fall on either side of the behavioral pivot value are reported.