Abstract: A CMOS Bandgap reference circuit (100) provides an output reference voltage (VOUT) with a defined temperature coefficient and comprises a PTAT current generator (102), providing a PTAT current (Iptat) with a positive temperature coefficient. The PTAT current generator (102) includes a first current path (A) with a first pn-junction diode (104) and a second current path (B) with a second pn-junction diode (110); and further includes a first current mirror (115), comprising a first mirror FET (116) with a channel (120, 124) connected in the first current path (A) and a gate (128) connected to a first mirror node (122), and a second mirror FET (118), with a channel (130, 134) connected in the second current path (B) and a gate (136) connected to the first mirror node (122). The first current mirror (115) provides the same current (Iptat) in both the first and the second current paths (A, B).

Abstract: A low dropout voltage regulator (100; 300) comprises a supply input terminal (102; 302) for connecting a supply voltage (VDD) and an output terminal (104; 304) for providing a regulated output voltage (V0), a reference voltage source (130; 330); and an output voltage monitor (120; 320). An error amplifier (132; 332) has an output (138; 338) supplying an error signal (Verr) in response to deviations of the regulated output voltage (Vout) from a desired target output voltage value (V0) at the output terminal (104; 304). A power output FET (110; 310), has a drain-source channel connected between the supply input terminal (102; 302) and the output terminal (104; 304) of the voltage regulator, and a gate terminal (116; 316). The gate terminal of the power output FET (110; 310) is controlled by the error amplifier (132; 332) via a driver FET (140; 340) in such a way that any deviations of the regulated output voltage (Vout) from a desired target output voltage value (V0) are minimized.

Abstract: A monolithic low dropout regulator includes an active capacitor multiplier that is used to form the dominant pole of the regulator, thereby yielding stability. This decouples the system stability from the high-frequency power supply rejection ratio (PSRR). The PSRR at high frequencies is tuned independently using a reasonable on-chip capacitor C2.

Abstract: A monolithic low dropout regulator includes an active capacitor multiplier that is used to form the dominant pole of the regulator, thereby yielding stability. This decouples the system stability from the high-frequency power supply rejection ratio (PSRR). The PSRR at high frequencies is tuned independently using a reasonable on-chip capacitor C2.

Abstract: A system and method to extract a threshold voltage for a MOSFET include first and second stages, which include inputs that receive functionally related input currents, are connected to each other. The first stage includes a second input that is coupled to a corresponding input of the second stage through part of a voltage divider. Another part of the voltage divider is coupled between an internal gate node and the input of the second stage that receives the respective input current. The input of the second stage that receives the respective input current also provides an output voltage substantially equal to the threshold voltage for one or both of the MOSFETs.

Abstract: A structure and method of minimizing package-shift effects in integrated circuits is implemented by using a thick metallic overcoat applied after the deposition and patterning of the conventional insulating protective overcoat. The metallic overcoat most preferably comprises a layer of electrolytically deposited copper approximately 15 &mgr;m thick that is patterned to provide for electrically independent regions; but an unbroken area of the metallic overcoat is left over any sensitive analog circuitry, such as a bandgap reference circuit. The thick metallic coating, in addition to minimizing package-shift effects, is also useful as a low-resistance routing layer. The metallic overcoat is sufficiently thin to allow low-profile packaging. The method employs a conductive overcoat that is significantly thin compared to conventional insulating conformal overcoats.

Abstract: The present invention relates to a method of improving power efficiency in a converter circuit at low load currents. The method comprises the steps of monitoring a load current of the converter circuit and adjusting a natural frequency of the converter circuit based on the load current. Such an adjustment of the natural frequency results in a reduction in switching losses at low load currents, thereby improving the power efficiency associated therewith. The present invention also relates to a circuit for improving a power efficiency in a dc—dc converter. The circuit comprises a converter circuit and a comparator circuit coupled to an input of the converter circuit.

Abstract: A voltage regulator circuit that provides the current necessary to drive an output driver during transients and maintain low output impedance, while having a much better dropout voltage than a single source follower gain stage includes: an output driver 22; a source follower 34 for controlling the output driver; a localized feedback gain loop coupled to the source follower 34; and an amplifier 24 for controlling the source follower 34.

Abstract: A system and method to extract a threshold voltage for a MOSFET are disclosed. First and second stages, which include inputs that receive functionally related input currents, are connected to each other. The first stage includes a second input that is coupled to a corresponding input of the second stage through part of a voltage divider. Another part of the voltage divider is coupled between an internal gate node and the input of the second stage that receives the respective input current. The input of the second stage that receives the respective input current also provides an output voltage substantially equal to the threshold voltage for one or both of the MOSFETs.

Abstract: The temperature compensated threshold circuit includes: a positive trip point circuit 60 for providing a positive trip point when an input voltage PSM is higher than a positive supply voltage VCC; a negative trip point circuit 62 for providing a negative trip point when the input voltage PSM is below a negative supply voltage AGND; and a bias circuit 64 for providing to the positive and negative trip point circuits 60 and 62 a first current proportional to absolute temperature and a second current proportional to a base emitter voltage.

Abstract: A voltage regulator circuit that provides the current necessary to drive an output driver during transients and maintain low output impedance, while having a much better dropout voltage than a single source follower gain stage includes: an output driver 22; a source follower 34 for controlling the output driver; a localized feedback gain loop coupled to the source follower 34; and an amplifier 24 for controlling the source follower 34.

Abstract: The buffer/driver for low dropout regulators (LDO) uses a feedback amplifier with low output impedance to drive the gate of the pass device MP6 of the regulator. This effectively pushes the gate pole out to a higher frequency. The feedback amplifier is designed for very high slew rate and high bandwidth while running at very low quiescent current. The circuit enhances the LDO performance, stability, and slew rate.

Abstract: A structure and method of minimizing package-shift effects in integrated circuits is implemented by using a thick metallic overcoat applied after the deposition and patterning of the conventional insulating protective overcoat. The metallic overcoat most preferably comprises a layer of electrolytically deposited copper approximately 15 &mgr;m thick that is patterned to provide for electrically independent regions; but an unbroken area of the metallic overcoat is left over any sensitive analog circuitry, such as a bandgap reference circuit. The thick metallic coating, in addition to minimizing package-shift effects, is also useful as a low-resistance routing layer. The metallic overcoat is sufficiently thin to allow low-profile packaging. The method employs a conductive overcoat that is significantly thin compared to conventional insulating conformal overcoats.

Abstract: The temperature compensated threshold circuit includes: a positive trip point circuit 60 for providing a positive trip point when an input voltage PSM is higher than a positive supply voltage VCC; a negative trip point circuit 62 for providing a negative trip point when the input voltage PSM is below a negative supply voltage AGND; and a bias circuit 64 for providing to the positive and negative trip point circuits 60 and 62 a first current proportional to absolute temperature and a second current proportional to a base emitter voltage.

Abstract: A structure and method of minimizing package-shift effects in integrated circuits is implemented by using a thick metallic overcoat applied after the deposition and patterning of the conventional insulating protective overcoat. The metallic overcoat most preferably comprises a layer of electrolytically deposited copper approximately 15 &mgr;m thick that is patterned to provide for electrically independent regions; but an unbroken area of the metallic overcoat is left over any sensitive analog circuitry, such as a bandgap reference circuit. The thick metallic coating, in addition to minimizing package-shift effects, is also useful as a low-resistance routing layer. The metallic overcoat is sufficiently thin to allow low-profile packaging. The method employs a conductive overcoat that is significantly thin compared to conventional insulating conformal overcoats.

Abstract: The buffer/driver for low dropout regulators (LDO) uses a feedback amplifier with low output impedance to drive the gate of the pass device MP6 of the regulator. This effectively pushes the gate pole out to a higher frequency. The feedback amplifier is designed for very high slew rate and high bandwidth while running at very low quiescent current. The circuit enhances the LDO performance, stability, and slew rate.

Abstract: The present invention relates to a hysteretic dc-dc converter circuit comprising a buck converter circuit having an output which forms an output of the converter circuit and a hysteretic comparator circuit having an output coupled to an input of the buck converter circuit and a first input coupled to the output of the converter circuit. The converter circuit also comprises a feedback circuit coupled between the output and a second input of the hysteretic comparator circuit. The feedback circuit generates a feedback ramp signal which is a function of an output of the hysteretic comparator circuit and which is out of phase with respect to the output of the converter circuit. The output feedback coupled with the ramp signal feedback provide for an increased hysteretic comparator trip frequency, thus increasing a natural frequency of the converter circuit without requiring an alteration of the hysteretic window.

Abstract: The present invention relates to a method of improving power efficiency in a converter circuit at low load currents. The method comprises the steps of monitoring a load current of the converter circuit and adjusting a natural frequency of the converter circuit based on the load current. Such an adjustment of the natural frequency results in a reduction in switching losses at low load currents, thereby improving the power efficiency associated therewith. The present invention also relates to a circuit for improving a power efficiency in a dc-dc converter. The circuit comprises a converter circuit and a comparator circuit coupled to an input of the converter circuit.

Abstract: The present invention relates to a hysteretic dc-dc converter circuit comprising a buck converter circuit having an output which forms an output of the converter circuit and a hysteretic comparator circuit having an output coupled to an input of the buck converter circuit and a first input coupled to the output of the converter circuit. The converter circuit also comprises a feedback circuit coupled between the output and a second input of the hysteretic comparator circuit. The feedback circuit generates a feedback ramp signal which is a function of an output of the hysteretic comparator circuit and which is out of phase with respect to the output of the converter circuit. The output feedback coupled with the ramp signal feedback provide for an increased hysteretic comparator trip frequency, thus increasing a natural frequency of the converter circuit without requiring an alteration of the hysteretic window.

Abstract: A curvature corrected bandgap reference voltage circuit, the output voltage of which is substantially linear and independent of the operating temperature of the circuit. The circuit includes a voltage divider network comprised of a first resistor and a second resistor connected in series. A first compensating circuit provides a first, linear, operating temperature-dependent current, and a second compensating circuit provides a second, logarithmic, operating temperature-dependent current. The first current is supplied to the first resistor of said voltage divider network, while the second current is supplied to the second resistor of the voltage divider network.