Abstract: Methods of testing a multilevel inverter include selectively pulsing (i.e., attempting to turn on) at least one of the inner and outer switches of the inverter and determining a status of at least one of the inner switches, the outer switches and the neutral clamping diodes of the inverter based whether the pulsed at least one of the inner and outer switches desaturates. The pulsing may be preceded by charging the DC bus to a predetermined voltage magnitude that is less than a nominal working voltage magnitude of the DC bus, e.g., the predetermined voltage magnitude may be around 50% or less of the nominal working voltage magnitude.

Abstract: An apparatus includes a plurality of DC buses and a plurality of inverter circuits, respective ones of which are coupled to respective ones of the plurality of DC buses. The apparatus further includes a control circuit configured to generate a representative DC voltage signal based on DC voltage signals for respective ones of the DC buses, to generate a first modulation control signal from the representative DC voltage signal, to generate second modulation control signals for the respective inverter circuits from the representative DC voltage signal and the first modulation control signal that are normalized based on the DC voltage signals for the buses and the representative DC voltage signal, and to modulate the inverter circuits responsive to respective ones of the second modulation control signals. The representative DC voltage signal may represent a maximum of the DC voltages for the respective DC buses.

Abstract: An apparatus includes an inverter configured to be connected to a load, a driver having an output coupled to control terminals of transistors of the inverter and a control input configured to receive control vectors and responsively apply control signals to control terminals of the inverter, a desaturation detector configured to detect desaturation of the transistors, and a controller coupled to the control input of the driver and configured to apply at least one test vector that causes the driver to turn on selected ones of the transistors for a duration sufficient for the desaturation detector to detect desaturation of at least one of the selected transistors and to enable or inhibit further operation of the inverter responsive to the desaturation detector. The load may be a motor and the controller may be configured to apply the at least one test vector responsive to a command to start the motor.

Abstract: An apparatus includes an inverter configured to be connected to a load, a driver having an output coupled to control terminals of transistors of the inverter and a control input configured to receive control vectors and responsively apply control signals to control terminals of the inverter, a desaturation detector configured to detect desaturation of the transistors, and a controller coupled to the control input of the driver and configured to apply at least one test vector that causes the driver to turn on selected ones of the transistors for a duration sufficient for the desaturation detector to detect desaturation of at least one of the selected transistors and to enable or inhibit further operation of the inverter responsive to the desaturation detector. The load may be a motor and the controller may be configured to apply the at least one test vector responsive to a command to start the motor.